On Fri, 3 Nov 2023 at 03:52, John Chew <yuinyee.c...@starfivetech.com> wrote:
>
> From: mindachen1987 <minda.c...@starfivetech.com>
>
> Add PCD for little endian CPU. During RX, the endianess of data receive
> via DMA will be swap.
>
I take it this means that the IP can be synthesized in both little and
big endian versions, right? Is there no ID register in the hardware
you can derive this information from?
Using PCDs like this generally not preferred, as it interferes with
the driver model. However, this driver does not implement the driver
model to begin with, so I suppose there is no issue here in that
sense.
> Cc: Sunil V L <suni...@ventanamicro.com>
> Cc: Leif Lindholm <quic_llind...@quicinc.com>
> Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Li Yong <yong...@intel.com>
> Co-authored-by: mindachen1987 <mindachen1...@starfivetech.com>
> Signed-off-by: John Chew <yuinyee.c...@starfivetech.com>
> ---
> Silicon/Synopsys/DesignWare/DesignWare.dec | 1 +
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c | 5 +++++
> Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf | 1 +
> 3 files changed, 7 insertions(+)
>
> diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dec
> b/Silicon/Synopsys/DesignWare/DesignWare.dec
> index f7ec7927543c..751370a8b1af 100755
> --- a/Silicon/Synopsys/DesignWare/DesignWare.dec
> +++ b/Silicon/Synopsys/DesignWare/DesignWare.dec
> @@ -31,3 +31,4 @@ [PcdsFixedAtBuild.common]
>
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00000003
>
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x00000004
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000005
> +
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian|FALSE|BOOLEAN|0x00000008
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> index 7ac286c5f361..edda28a45d7c 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
> @@ -588,6 +588,11 @@ DwEmmcReadBlockData (
> }
> Status = DwEmmcWaitDmaComplete(This, 1);
>
> + if (DWMCI_SD_READ_MASK(mDwEmmcArgument) && (FixedPcdGetBool
> (PcdDwEmmcDxeCPULittleEndian))) {
> + Buffer[3] = SwapBytes32(Buffer[3]);
> + Buffer[4] = SwapBytes32(Buffer[4]);
> + }
> +
> out:
> // Restore Tpl
> gBS->RestoreTPL (Tpl);
> diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> index 7f70fe1e2a38..18c84a4172f9 100644
> --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
> @@ -51,6 +51,7 @@ [Pcd]
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz
> gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth
> gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers
> + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian
>
> [Depex]
> TRUE
> --
> 2.34.1
>
>
>
>
>
>
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