Reviewed-by: Ray Ni <ray...@intel.com>
> -----Original Message-----
> From: Xie, Yuanhao <yuanhao....@intel.com>
> Sent: Thursday, July 20, 2023 3:08 PM
> To: devel@edk2.groups.io
> Cc: Xie, Yuanhao <yuanhao....@intel.com>; Dong, Guo <guo.d...@intel.com>;
> Ni, Ray <ray...@intel.com>; Rhodes, Sean <sean@starlabs.systems>; Lu, James
> <james...@intel.com>; Guo, Gua <gua....@intel.com>
> Subject: [Patch V3 1/4] UefiCpuPkg: Add SendStartupIpiAllExcludingSelf
>
> From: Yuanhao Xie <yuanhao....@intel.com>
>
> Add new API SendStartupIpiAllExcludingSelf(), and modify
> SendInitSipiSipiAllExcludingSelf() by let it call the new API.
>
> Cc: Guo Dong <guo.d...@intel.com>
> Cc: Ray Ni <ray...@intel.com>
> Cc: Sean Rhodes <sean@starlabs.systems>
> Cc: James Lu <james...@intel.com>
> Cc: Gua Guo <gua....@intel.com>
> Signed-off-by: Yuanhao Xie <yuanhao....@intel.com>
> ---
> UefiCpuPkg/Include/Library/LocalApicLib.h | 17
> ++++++++++++++++-
> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 43
> ++++++++++++++++++++++++++++++-------------
> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 43
> ++++++++++++++++++++++++++++++-------------
> 3 files changed, 76 insertions(+), 27 deletions(-)
>
> diff --git a/UefiCpuPkg/Include/Library/LocalApicLib.h
> b/UefiCpuPkg/Include/Library/LocalApicLib.h
> index b55d88b0f5..d7c2ad3f70 100644
> --- a/UefiCpuPkg/Include/Library/LocalApicLib.h
> +++ b/UefiCpuPkg/Include/Library/LocalApicLib.h
> @@ -4,7 +4,7 @@
> Local APIC library assumes local APIC is enabled. It does not
> handles cases where local APIC is disabled.
>
> - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -185,6 +185,21 @@ SendInitIpiAllExcludingSelf (
> VOID
> );
>
> +/**
> + Send a Start-up IPI to all processors excluding self.
> + This function returns after the IPI has been accepted by the target
> processors.
> + if StartupRoutine >= 1M, then ASSERT.
> + if StartupRoutine is not multiple of 4K, then ASSERT.
> + @param StartupRoutine Points to a start-up routine which is below 1M
> physical
> + address and 4K aligned.
> +**/
> +
> +VOID
> +EFIAPI
> +SendStartupIpiAllExcludingSelf (
> + IN UINT32 StartupRoutine
> + );
> +
> /**
> Send an INIT-Start-up-Start-up IPI sequence to a specified target
> processor.
>
> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> index 008b8a070b..d56c6275cc 100644
> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
> @@ -3,7 +3,7 @@
>
> This local APIC library instance supports xAPIC mode only.
>
> - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
> @@ -497,6 +497,33 @@ SendInitIpiAllExcludingSelf (
> SendIpi (IcrLow.Uint32, 0);
> }
>
> +/**
> + Send a Start-up IPI to all processors excluding self.
> + This function returns after the IPI has been accepted by the target
> processors.
> + if StartupRoutine >= 1M, then ASSERT.
> + if StartupRoutine is not multiple of 4K, then ASSERT.
> + @param StartupRoutine Points to a start-up routine which is below 1M
> physical
> + address and 4K aligned.
> +**/
> +VOID
> +EFIAPI
> +SendStartupIpiAllExcludingSelf (
> + IN UINT32 StartupRoutine
> + )
> +{
> + LOCAL_APIC_ICR_LOW IcrLow;
> +
> + ASSERT (StartupRoutine < 0x100000);
> + ASSERT ((StartupRoutine & 0xfff) == 0);
> +
> + IcrLow.Uint32 = 0;
> + IcrLow.Bits.Vector = (StartupRoutine >> 12);
> + IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> + IcrLow.Bits.Level = 1;
> + IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> + SendIpi (IcrLow.Uint32, 0);
> +}
> +
> /**
> Send an INIT-Start-up-Start-up IPI sequence to a specified target
> processor.
>
> @@ -551,22 +578,12 @@ SendInitSipiSipiAllExcludingSelf (
> IN UINT32 StartupRoutine
> )
> {
> - LOCAL_APIC_ICR_LOW IcrLow;
> -
> - ASSERT (StartupRoutine < 0x100000);
> - ASSERT ((StartupRoutine & 0xfff) == 0);
> -
> SendInitIpiAllExcludingSelf ();
> MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds));
> - IcrLow.Uint32 = 0;
> - IcrLow.Bits.Vector = (StartupRoutine >> 12);
> - IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> - IcrLow.Bits.Level = 1;
> - IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> - SendIpi (IcrLow.Uint32, 0);
> + SendStartupIpiAllExcludingSelf (StartupRoutine);
> if (!StandardSignatureIsAuthenticAMD ()) {
> MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + SendStartupIpiAllExcludingSelf (StartupRoutine);
> }
> }
>
> diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> index 0ba0499631..aa4eb11181 100644
> --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
> @@ -4,7 +4,7 @@
> This local APIC library instance supports x2APIC capable processors
> which have xAPIC and x2APIC modes.
>
> - Copyright (c) 2010 - 2019, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2010 - 2023, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
> @@ -736,6 +736,33 @@ SendInitIpiAllExcludingSelf (
> SendIpi (IcrLow.Uint32, 0);
> }
>
> +/**
> + Send a Start-up IPI to all processors excluding self.
> + This function returns after the IPI has been accepted by the target
> processors.
> + if StartupRoutine >= 1M, then ASSERT.
> + if StartupRoutine is not multiple of 4K, then ASSERT.
> + @param StartupRoutine Points to a start-up routine which is below 1M
> physical
> + address and 4K aligned.
> +**/
> +VOID
> +EFIAPI
> +SendStartupIpiAllExcludingSelf (
> + IN UINT32 StartupRoutine
> + )
> +{
> + LOCAL_APIC_ICR_LOW IcrLow;
> +
> + ASSERT (StartupRoutine < 0x100000);
> + ASSERT ((StartupRoutine & 0xfff) == 0);
> +
> + IcrLow.Uint32 = 0;
> + IcrLow.Bits.Vector = (StartupRoutine >> 12);
> + IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> + IcrLow.Bits.Level = 1;
> + IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> + SendIpi (IcrLow.Uint32, 0);
> +}
> +
> /**
> Send an INIT-Start-up-Start-up IPI sequence to a specified target
> processor.
>
> @@ -790,22 +817,12 @@ SendInitSipiSipiAllExcludingSelf (
> IN UINT32 StartupRoutine
> )
> {
> - LOCAL_APIC_ICR_LOW IcrLow;
> -
> - ASSERT (StartupRoutine < 0x100000);
> - ASSERT ((StartupRoutine & 0xfff) == 0);
> -
> SendInitIpiAllExcludingSelf ();
> MicroSecondDelay (PcdGet32 (PcdCpuInitIpiDelayInMicroSeconds));
> - IcrLow.Uint32 = 0;
> - IcrLow.Bits.Vector = (StartupRoutine >> 12);
> - IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
> - IcrLow.Bits.Level = 1;
> - IcrLow.Bits.DestinationShorthand =
> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
> - SendIpi (IcrLow.Uint32, 0);
> + SendStartupIpiAllExcludingSelf (StartupRoutine);
> if (!StandardSignatureIsAuthenticAMD ()) {
> MicroSecondDelay (200);
> - SendIpi (IcrLow.Uint32, 0);
> + SendStartupIpiAllExcludingSelf (StartupRoutine);
> }
> }
>
> --
> 2.36.1.windows.1
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