Hi Vivek, Thank you for this patch.
Reviewed-by: Sami Mujawar <sami.muja...@arm.com> Regards, Sami Mujawar On 24/03/2023 11:03 am, Vivek Gautam wrote:
For all the RD-N2 platform variants, include the SSDT ACPI table that describes the devices present in SoC expansion block that is connected to the IO virtualization block. Signed-off-by: Vivek Gautam <vivek.gau...@arm.com> --- Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 5 +++++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 5 +++++ Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf | 3 +++ 3 files changed, 13 insertions(+) diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf index 833f87c3e4be..8025ef58171b 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtEvents.asl + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl@@ -55,11 +56,15 @@gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax+ gArmSgiTokenSpaceGuid.PcdChipCountgArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress gArmSgiTokenSpaceGuid.PcdGpioController0Size gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf index e3e4e55bc410..88e210933f6d 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf @@ -26,6 +26,7 @@ Spcr.aslc Ssdt.asl SsdtEvents.asl + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl@@ -55,11 +56,15 @@gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax+ gArmSgiTokenSpaceGuid.PcdChipCountgArmSgiTokenSpaceGuid.PcdGpioController0BaseAddress gArmSgiTokenSpaceGuid.PcdGpioController0Size gArmSgiTokenSpaceGuid.PcdGpioController0Interrupt gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable + gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable gArmSgiTokenSpaceGuid.PcdSmmuBase diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf index 6ce78582da35..ad81be29cd42 100644 --- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf +++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg2AcpiTables.inf @@ -23,6 +23,7 @@ RdN2Cfg2/Pptt.aslc RdN2Cfg2/Srat.aslc Spcr.aslc + SsdtIoVirtSocExp.asl SsdtRos.asl SsdtRosVirtioP9.asl@@ -57,6 +58,8 @@gArmSgiTokenSpaceGuid.PcdDramBlock2Size gArmSgiTokenSpaceGuid.PcdGtFrame0Gsiv gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base + gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip gArmSgiTokenSpaceGuid.PcdOscLpiEnable gArmSgiTokenSpaceGuid.PcdOscCppcEnable
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