RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib.
Cc: Daniel Schaefer <g...@danielschaefer.me>
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warken...@intel.com>
Signed-off-by: Evan Chai <evan.c...@intel.com>
---
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
| 4 +++-
Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
| 4 +++-
Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
| 3 ++-
Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
| 4 ++--
Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
| 4 ++--
Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
| 2 ++
Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
| 3 ++-
7 files changed, 16 insertions(+), 8 deletions(-)
diff --git
a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
index 524b0a63..30ec8a8b 100644
--- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.c
@@ -2,13 +2,15 @@
Reset System Library functions for RISC-V
Copyright (c) 2021, Hewlett Packard Development LP. All rights reserved.<BR>
+ Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include <Library/DebugLib.h>
#include <Library/ResetSystemLib.h>
-#include <Library/RiscVEdk2SbiLib.h>
+#include <Library/BaseRiscVSbiLib.h>
/**
This function causes a system-wide reset (cold reset), in which
diff --git
a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
index 8987adb9..605d9efd 100644
--- a/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
+++ b/Platform/RISC-V/PlatformPkg/Library/ResetSystemLib/ResetSystemLib.inf
@@ -2,6 +2,8 @@
# Library instance for ResetSystem library class for RISC-V using SBI ecalls
#
# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -29,4 +31,4 @@
[LibraryClasses]
DebugLib
- RiscVEdk2SbiLib
+ RiscVSbiLib
diff --git a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
index 1e8d53f4..8eef9fbb 100644
--- a/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
+++ b/Platform/RISC-V/PlatformPkg/Universal/Sec/SecMain.inf
@@ -2,6 +2,7 @@
# RISC-V SEC module.
#
# Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -52,7 +53,7 @@
RiscVCpuLib
RiscVOpensbiLib
RiscVOpensbiPlatformLib
- RiscVEdk2SbiLib
+ RiscVSbiLib
[FixedPcd]
gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
index 95bf5ac4..4dc24386 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU500VC707Board/U500.dsc
@@ -148,10 +148,10 @@
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
!endif
RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
-
RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
+ RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf
-
CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+
CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
# Flattened Device Tree (FDT) access library
FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf
diff --git
a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
index 099c4e22..9dff112d 100644
--- a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
+++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/U540.dsc
@@ -149,11 +149,11 @@
BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
!endif
RiscVCpuLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
-
RiscVEdk2SbiLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVEdk2SbiLib/RiscVEdk2SbiLib.inf
+ RiscVSbiLib|MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf
RiscVPlatformTimerLib|Platform/SiFive/U5SeriesPkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
#MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/MachineModeTimerLib/MachineModeTimerLib.inf
MachineModeTimerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVReadMachineModeTimer/EmulatedMachineModeTimerLib/EmulatedMachineModeTimerLib.inf
-
CpuExceptionHandlerLib|Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+
CpuExceptionHandlerLib|UefiCpuPkg/Library/BaseRiscV64CpuExceptionHandlerLib/BaseRiscV64CpuExceptionHandlerLib.inf
# Flattened Device Tree (FDT) access library
diff --git
a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
index 1158fe62..773b149b 100644
---
a/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+++
b/Platform/SiFive/U5SeriesPkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
@@ -6,6 +6,7 @@
# Protocol for a RAM flash device.
#
# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -37,6 +38,7 @@
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
Platform/RISC-V/PlatformPkg/RiscVPlatformPkg.dec
+ Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec
[LibraryClasses]
BaseLib
diff --git a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
index 072024dc..13c25506 100644
--- a/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+++ b/Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
@@ -2,6 +2,7 @@
# Library instance to create core information HOB
#
# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+# Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -38,7 +39,7 @@
MemoryAllocationLib
PrintLib
FirmwareContextProcessorSpecificLib
- RiscVEdk2SbiLib
+ RiscVSbiLib
[FixedPcd]
gUefiRiscVPkgTokenSpaceGuid.PcdProcessorSpecificDataGuidHobGuid
--
2.34.1
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