Current implementation for cache management (instruction/data flush/invd) depends on fence.i instruction. All RV platforms may not use the same method for cache management. Instead RV defines CMO Cache management operations specification which consits of cbo.x instructions for cache management. However it requires GCC12+ to enable the same. Need to decide how cbo based implementation coexists with ifence based implementation with GCC version dependency.
This patchset is primarily to review the same and decide path forward. review branch: https://github.com/rivosinc/edk2/tree/dev_rv_cmo_v3 Dhaval Sharma (2): WIP: MdePkg/RiscVCMOCacheMaintenanceLib:Enable RISCV CMO OvmfPkg/RiscVVirt: Enable CMO support MdePkg/MdePkg.dsc | 1 + OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 9 + MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCacheMaintenanceLib.inf | 30 ++ MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCache.c | 377 ++++++++++++++++++++ MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCacheMaintenanceLib.uni | 11 + MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCpuCMOCache.S | 23 ++ 6 files changed, 451 insertions(+) create mode 100644 MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCacheMaintenanceLib.inf create mode 100644 MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCache.c create mode 100644 MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCMOCacheMaintenanceLib.uni create mode 100644 MdePkg/Library/RiscVCMOCacheMaintenanceLib/RiscVCpuCMOCache.S -- 2.40.0.rc0.57.g454dfcbddf -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102277): https://edk2.groups.io/g/devel/message/102277 Mute This Topic: https://groups.io/mt/97970173/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
