Reviewed-by: Ted Kuo <ted....@intel.com> -----Original Message----- From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu, Chasel Sent: Wednesday, March 29, 2023 11:44 PM To: devel@edk2.groups.io Cc: Chiu, Chasel <chasel.c...@intel.com>; Desimone, Nathaniel L <nathaniel.l.desim...@intel.com>; Zeng, Star <star.z...@intel.com>; Ni, Ray <ray...@intel.com> Subject: [edk2-devel] [PATCH v2] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary delay.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4391 FSP should support the scenario that CPU microcode already loaded before calling LoadMicrocodeDefault(), in this case it should return directly without spending more time. Also the LoadMicrocodeDefault() should only attempt to load one version of the microcode for current CPU and return. Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> Cc: Star Zeng <star.z...@intel.com> Cc: Ray Ni <ray...@intel.com> Signed-off-by: Chasel Chiu <chasel.c...@intel.com> --- IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm | 18 ++++++++++++++---- IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 16 ++++++++++++---- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm index 2cff8b3643..b902d017ee 100644 --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm @@ -245,6 +245,19 @@ ASM_PFX(LoadMicrocodeDefault): cmp esp, 0 jz ParamError + ;+ ; If microcode already loaded before this function, exit this function with SUCCESS.+ ;+ mov eax, 1+ cpuid+ mov ecx, MSR_IA32_BIOS_SIGN_ID+ rdmsr ; Get current microcode signature+ xor eax, eax+ test edx, edx+ jnz Exit2+++ ; skip loading Microcode if the MicrocodeCodeSize is zero ; and report error if size is less than 2k ; first check UPD header revision@@ -450,7 +463,7 @@ LoadCheck: ; Verify this microcode update is not already loaded cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx- je Continue+ je Done ; if already one version microcode loaded, go to done LoadMicrocode: ; EAX contains the linear address of the start of the Update Data@@ -465,9 +478,6 @@ LoadMicrocode: mov eax, 1 cpuid -Continue:- jmp NextMicrocode- Done: mov eax, 1 cpuiddiff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm index b32fa32a89..2a23c33c9b 100644 --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm @@ -141,6 +141,17 @@ ASM_PFX(LoadMicrocodeDefault): jz ParamError mov rsp, rcx + ;+ ; If microcode already loaded before this function, exit this function with SUCCESS.+ ;+ mov eax, 1+ cpuid+ mov ecx, MSR_IA32_BIOS_SIGN_ID+ rdmsr ; Get current microcode signature+ xor rax, rax+ test edx, edx+ jnz Exit2+ ; skip loading Microcode if the MicrocodeCodeSize is zero ; and report error if size is less than 2k ; first check UPD header revision@@ -291,7 +302,7 @@ LoadCheck: ; Verify this microcode update is not already loaded cmp dword [esi + MicrocodeHdr.MicrocodeHdrRevision], edx- je Continue+ je Done ; if already one version microcode loaded, go to done LoadMicrocode: ; EAX contains the linear address of the start of the Update Data@@ -306,9 +317,6 @@ LoadMicrocode: mov eax, 1 cpuid -Continue:- jmp NextMicrocode- Done: mov eax, 1 cpuid-- 2.35.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102124): https://edk2.groups.io/g/devel/message/102124 Mute This Topic: https://groups.io/mt/97931383/1862468 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [ted....@intel.com] -=-=-=-=-=-= -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#102146): https://edk2.groups.io/g/devel/message/102146 Mute This Topic: https://groups.io/mt/97931383/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
