Reviewed-by: Ray Ni <ray...@intel.com>
> -----Original Message-----
> From: Tan, Dun <dun....@intel.com>
> Sent: Thursday, March 23, 2023 3:41 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.d...@intel.com>; Ni, Ray <ray...@intel.com>; Kumar,
> Rahul R <rahul.r.ku...@intel.com>; Gerd Hoffmann <kra...@redhat.com>
> Subject: [Patch V4 17/21] UefiCpuPkg/CpuPageTableLib: Add check for page
> table creation
>
> Add code to compare ParentPagingEntry Attribute&Mask and input
> Attribute&Mask to decide if new next level page table is needed
> in non-present ParentPagingEntry condition. This can help avoid
> unneccessary page table creation.
>
> For example, there is a page table in which [0, 1G] is mapped(Lv4[0]
> ,Lv3[0,0], a non-leaf level4 entry and a leaf level3 entry).And we
> only want to map [1G, 1G+2M] linear address still as non-present.
> The expected behaviour should be nothing happens in the process.
> However, previous code logic doesn't check if ParentPagingEntry
> Attribute&Mask and input Attribute&Mask are the same in non-present
> ParentPagingEntry condition. Then a new 4K memory is allocated for
> Lv2 since 1G+2M is not 1G-aligned.
> So when ParentPagingEntry is non-present, before allocate 4K memory
> for next level paging, we also check if ParentPagingEntry Attribute&
> Mask and input Attribute&Mask are the same.
>
> Signed-off-by: Dun Tan <dun....@intel.com>
> Cc: Eric Dong <eric.d...@intel.com>
> Cc: Ray Ni <ray...@intel.com>
> Cc: Rahul Kumar <rahul1.ku...@intel.com>
> Cc: Gerd Hoffmann <kra...@redhat.com>
> ---
> UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 10
> ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> index 982652b58b..55a756ad90 100644
> --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
> @@ -358,6 +358,16 @@ PageTableLibMapInLevel (
> return Status;
> }
>
> + //
> + // Check the attribute in ParentPagingEntry is equal to attribute
> calculated
> by input Attribue and Mask.
> + //
> + PleBAttribute.Uint64 = PageTableLibGetPleBMapAttribute
> (&ParentPagingEntry->PleB, ParentAttribute);
> + if ((IA32_MAP_ATTRIBUTE_ATTRIBUTES (&PleBAttribute) &
> IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask))
> + == (IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute) &
> IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask)))
> + {
> + return RETURN_SUCCESS;
> + }
> +
> //
> // The parent entry is CR3 or PML5E/PML4E/PDPTE/PDE.
> // It does NOT point to an existing page directory.
> --
> 2.31.1.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#101688): https://edk2.groups.io/g/devel/message/101688
Mute This Topic: https://groups.io/mt/97796395/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe:
https://edk2.groups.io/g/devel/leave/9847357/21656/1706620634/xyzzy
[arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-
