On Thu, Feb 23, 2023 at 05:54:54PM -0600, Andrei Warkentin wrote: > RegisterCpuInterruptHandler did not allow setting > exception handlers for anything beyond the timer IRQ. > Beyond that, it didn't meet the spec around handling > of inputs. > > RiscVSupervisorModeTrapHandler now will invoke > set handlers for both exceptions and interrupts. > Two arrays of handlers are maintained - one for exceptions > and one for interrupts. > > For unhandled traps, RiscVSupervisorModeTrapHandler dumps > state using the now implemented DumpCpuContext. > > For EFI_SYSTEM_CONTEXT_RISCV64, extend this with the trapped > PC address (SEPC), just like on AArch64 (ELR). This is > necessary for X86EmulatorPkg to work as it allows a trap > handler to return execution to a different place. Add > SSTATUS/STVAL as well, at least for debugging purposes. There > is no value in hiding this. > > Fix nested exception handling. Handler code should not > be saving SIE (the value is saved in SSTATUS.SPIE) or > directly restored (that's done by SRET). Save and > restore the entire SSTATUS and STVAL, too. > > Cc: Sunil V L <suni...@ventanamicro.com> > Cc: Daniel Schaefer <g...@danielschaefer.me> > Signed-off-by: Andrei Warkentin <andrei.warken...@intel.com> > --- > MdePkg/Include/Protocol/DebugSupport.h | 32 ++- > .../CpuExceptionHandlerLib.h | 11 +- > UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 6 +- > .../CpuExceptionHandlerLib.c | 232 ++++++++++++++++-- > .../SupervisorTrapHandler.S | 17 +- > 5 files changed, 254 insertions(+), 44 deletions(-) > Reviewed-by: Sunil V L <suni...@ventanamicro.com>
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