Thanks Ray, I will update all. > -----Original Message----- > From: Ni, Ray <ray...@intel.com> > Sent: Friday, February 10, 2023 8:57 PM > To: devel@edk2.groups.io; Wu, Jiaxin <jiaxin...@intel.com> > Subject: RE: [edk2-devel] [PATCH v4 0/5] Simplify SMM Relocation Process > > Jiaxin, > I provide separate review comments for each patch. > > Can you please make sure the copy right year is updated for every file > change? > I may not emphasize this for each patch. > > > -----Original Message----- > > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Wu, > Jiaxin > > Sent: Friday, February 10, 2023 2:05 PM > > To: devel@edk2.groups.io > > Subject: [edk2-devel] [PATCH v4 0/5] Simplify SMM Relocation Process > > > > Existing SMBASE Relocation is in the PiSmmCpuDxeSmm driver, which > > will relocate the SMBASE of each processor by setting the SMBASE > > field in the saved state map (at offset 7EF8h) to a new value. > > The RSM instruction reloads the internal SMBASE register with the > > value in SMBASE field when each time it exits SMM. All subsequent > > SMI requests will use the new SMBASE to find the starting address > > for the SMI handler (at SMBASE + 8000h). > > > > Due to the default SMBASE for all x86 processors is 0x30000, the > > APs' 1st SMI for rebase has to be executed one by one to avoid > > the CPUs over-writing each other's SMM Save State Area (see > > existing SmmRelocateBases() function), which means the next AP has > > to wait for the previous AP to finish its 1st SMI, then it can call > > into its 1st SMI for rebase via Smi Ipi command, thus leading the > > existing SMBASE Relocation has to be running in series. Besides, it > > needs very complex code to handle the AP exit semaphore > > (mRebased[Index]), which will hook return address of SMM Save State > > so that semaphore code can be executed immediately after AP exits > > SMM for SMBASE relocation (see existing SemaphoreHook() function). > > > > This series is to add the new SMM Base HOB for any PEI module to do > > the SmBase relocation ahead of PiSmmCpuDxeSmm driver and store the > > relocated SmBase address in array for each Processors. When the > > SMBASE relocation happens in a PEI module, the PEI module shall > > produce the SMM_BASE_HOB in HOB database which tells the > > PiSmmCpuDxeSmm driver (runs at a later phase) about the new SMBASE > > for each CPU thread. PiSmmCpuDxeSmm driver installs the SMI handler > > at the SMM_BASE_HOB.SmBase[Index]+0x8000 for CPU thread Index. > When > > the HOB doesn't exist, PiSmmCpuDxeSmm driver shall relocate and > > program the new SMBASE itself (keep existing SMBASE Relocation way). > > > > With SMM Base Hob support, PiSmmCpuDxeSmm does not need the RSM > > instruction to do the SMBASE Relocation. SMBASE Register for each > > processors have already been programmed and all SMBASE address have > > recorded in SMM Base Hob. So the same default SMBASE Address > > (0x30000) will not be used, thus the CPUs over-writing each other's > > SMM Save State Area will not happen in PiSmmCpuDxeSmm driver. This > > way makes the first SMI init can be executed in parallel and save > > boot time on multi-core system. Besides, Semaphore Hook code logic > > is also not required, which will greatly simplify the SMBASE > > Relocation flow. > > > > Note: > > This is the new way that firmware can program the SMBASE > > independently of the RSM instruction. The PEI code performing > > this logic will not be open sourced, similarly to other things > > that are kept binary-only in the FSP. Due to the register > > difference in different vender, and it has not been documented > > in the Intel SDM yet, we need a new binary-only interface for > > SMM Base HOB. > > > > Jiaxin Wu (5): > > UefiCpuPkg/PiSmmCpuDxeSmm: Fix invalid InitializeMpSyncData call > > UefiCpuPkg/SmmBaseHob.h: Add SMM Base HOB Data > > UefiCpuPkg/PiSmmCpuDxeSmm: Consume SMM Base Hob for SmBase > info > > UefiCpuPkg/SmmCpuFeaturesLib: Skip SMBASE configuration > > OvmfPkg/SmmCpuFeaturesLib: Check SmBase relocation supported or > not > > > > .../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 8 + > > .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + > > UefiCpuPkg/Include/Guid/SmmBaseHob.h | 64 +++++++ > > .../Library/SmmCpuFeaturesLib/CpuFeaturesLib.h | 2 + > > .../SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c | 23 ++- > > .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf | 4 + > > .../SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf | 1 + > > UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c | 1 - > > .../StandaloneMmCpuFeaturesLib.inf | 4 + > > UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 29 +++- > > UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 23 +++ > > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 191 > > ++++++++++++++++----- > > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 24 +++ > > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + > > UefiCpuPkg/UefiCpuPkg.dec | 3 + > > 15 files changed, 332 insertions(+), 50 deletions(-) > > create mode 100644 UefiCpuPkg/Include/Guid/SmmBaseHob.h > > > > -- > > 2.16.2.windows.1 > > > > > > > > > >
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