Hi Pierre,
On 2/3/23 21:25, PierreGondois via groups.io wrote:
Hello Vivek,
Thanks for your review. Please find my responses inline below.
On 1/27/23 10:23, Vivek Gautam wrote:
From: Shriram K <shrira...@arm.com>
The IO virtualization block on reference design platforms allow
connecting SoC expansion devices such as PL011 UART. On platforms
that support this, initialize the UART controller connected to the
IO virtualization block.
Signed-off-by: Shriram K <shrira...@arm.com>
Signed-off-by: Vivek Gautam <vivek.gau...@arm.com>
---
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf | 10 ++-
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 7 ++-
Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.c | 64
+++++++++++++++++++-
Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 43
++++++++++++-
Platform/ARM/SgiPkg/SgiPlatform.dec | 1 +
5 files changed, 118 insertions(+), 7 deletions(-)
[snip]
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
index 8139b75d8ee4..08aa9bf64940 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018-2020, ARM Limited. All rights reserved.
+* Copyright (c) 2018 - 2023, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -13,11 +13,23 @@
#include <Library/IoLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <IoVirtSoCExp.h>
#include <SgiPlatform.h>
// Total number of descriptors, including the final "end-of-table"
descriptor.
-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \
- (14 + (FixedPcdGet32 (PcdChipCount) * 2))
+#define
MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS \
+ ((14 + (FixedPcdGet32 (PcdChipCount) * 2))
+ \
+ (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable)
* \
+ FixedPcdGet32 (PcdChipCount) * 2))
+
+// Memory Map descriptor for IO Virtualization SoC Expansion Block UART
+#define IO_VIRT_SOC_EXP_BLK_UART_MMAP(UartIdx,
ChipIdx) \
+ VirtualMemoryTable[++Index].PhysicalBase
= \
+ SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) +
UART_START(UartIdx); \
+ VirtualMemoryTable[Index].VirtualBase
= \
+ SGI_REMOTE_CHIP_MEM_OFFSET(ChipIdx) +
UART_START(UartIdx); \
+ VirtualMemoryTable[Index].Length =
SIZE_64KB; \
+ VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
/**
Returns the Virtual Memory Map of the platform.
@@ -171,6 +183,31 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = SIZE_64KB;
VirtualMemoryTable[Index].Attributes =
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
+#if (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) == 1)
+ // Chip-0 IO Virtualization SoC Expansion Block - UART0
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 0)
+ // Chip-0 IO Virtualization SoC Expansion Block - UART0
NIT: shouldn't it be UART1 ?
Yes, it should be UART1. Will correct it.
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 0)
+#if (FixedPcdGet32 (PcdChipCount) > 1)
+ // Chip-1 IO Virtualization SoC Expansion Block - UART0
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 1)
+ // Chip-1 IO Virtualization SoC Expansion Block - UART1
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 1)
+#if (FixedPcdGet32 (PcdChipCount) > 2)
+ // Chip-2 IO Virtualization SoC Expansion Block - UART0
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 2)
+ // Chip-2 IO Virtualization SoC Expansion Block - UART1
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 2)
+#if (FixedPcdGet32 (PcdChipCount) > 3)
+ // Chip-3 IO Virtualization SoC Expansion Block - UART0
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(0, 3)
+ // Chip-3 IO Virtualization SoC Expansion Block - UART1
+ IO_VIRT_SOC_EXP_BLK_UART_MMAP(1, 3)
+#endif
+#endif
+#endif
+#endif
+
// DDR - (2GB - 16MB)
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64
(PcdSystemMemoryBase);
VirtualMemoryTable[Index].VirtualBase = PcdGet64
(PcdSystemMemoryBase);
diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index 407f03c1c3e8..43d350ec48bb 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -102,6 +102,7 @@
gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base|0|UINT64|0x0000002B
gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkPeriOffset|0|UINT32|0x0000002C
gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkResourceSize|0|UINT32|0x0000002D
+ gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable|0|UINT32|0x0000002E
PcdIoVirtSocExpBlkUartEnable isn't set for any platform, is it normal ?
Yes, by default we are keeping these Uarts disabled as these are not
used for system debug. Platforms that plan to use them can enable these
in debug/production as needed.
Best regards
Vivek
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