REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076
RISC-V register names do not follow the EDK2 formatting. So, add it to ignore list for now. Cc: Eric Dong <[email protected]> Cc: Ray Ni <[email protected]> Cc: Rahul Kumar <[email protected]> Cc: Gerd Hoffmann <[email protected]> Signed-off-by: Sunil V L <[email protected]> Acked-by: Abner Chang <[email protected]> --- UefiCpuPkg/UefiCpuPkg.ci.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml index a377366798b0..953361ba0479 100644 --- a/UefiCpuPkg/UefiCpuPkg.ci.yaml +++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml @@ -27,6 +27,7 @@ ], ## Both file path and directory path are accepted. "IgnoreFiles": [ + "Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h" ] }, "CompilerPlugin": { -- 2.38.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#99234): https://edk2.groups.io/g/devel/message/99234 Mute This Topic: https://groups.io/mt/96593505/21656 Group Owner: [email protected] Unsubscribe: https://edk2.groups.io/g/devel/unsub [[email protected]] -=-=-=-=-=-=-=-=-=-=-=-
