Reviewed-by: Ray Ni <ray...@intel.com> > -----Original Message----- > From: Duggapu, Chinni B <chinni.b.dugg...@intel.com> > Sent: Monday, November 7, 2022 2:48 PM > To: devel@edk2.groups.io > Cc: Duggapu, Chinni B <chinni.b.dugg...@intel.com>; Ni, Ray > <ray...@intel.com> > Subject: [PATCH] UefiCpuPkg/ResetVector:Add Option to reserve 4K region > at 4GB > > From: "Duggapu, Chinni B" <chinni.b.dugg...@intel.com> > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4140 > > Some implementations may need to keep the initial Reset code to be > separated out from rest of the code.This request is to add padding at > lower 4K region below 4 GB which will result having only few jmp > instructions and data at that region. > > Cc: Ray Ni <ray...@intel.com> > Signed-off-by: Duggapu Chinni B <chinni.b.dugg...@intel.com> > --- > UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm > b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm > index 7538192876..fe5bbea803 100644 > --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm > +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm > @@ -21,7 +21,15 @@ ALIGN 16 > ; located just below 0x100000000 (4GB) in the firmware device. > > ; > > %ifdef ALIGN_TOP_TO_4K_FOR_PAGING > > - TIMES (0x1000 - ($ - EndOfPageTables) - 0x20) DB 0 > > + TIMES (0x1000 - ($ - EndOfPageTables)) DB 0 > > +; > > +; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block. > > +; Some implementations may need to keep the initial Reset code > > +; to be separated out from rest of the code. > > +; This padding will make sure lower 4K region below 4 GB may > > +; only contains few jmp instructions and data. > > +; > > + TIMES (0x1000 - 0x20) DB 0 > > %endif > > > > applicationProcessorEntryPoint: > > -- > 2.30.2.windows.1
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