Pushed as 7f63ab7da9..b74194d8b8
-----Original Message-----
From: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>
Sent: Wednesday, September 7, 2022 3:57 PM
To: Benjamin Doron <benjamin.doro...@gmail.com>; devel@edk2.groups.io
Cc: Oram, Isaac W <isaac.w.o...@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desim...@intel.com>; Sinha, Ankit <ankit.si...@intel.com>; Ni, Ray
<ray...@intel.com>; Chiu, Chasel <chasel.c...@intel.com>; Luo, Heng
<heng....@intel.com>
Subject: RE: [edk2-devel][edk2-platforms][PATCH v2 1/6]
{Platform,Silicon}/Intel: Move PcdAcpiBaseAddress definition
Reviewed-by: Sai Chaganty <rangasai.v.chaga...@intel.com>
-----Original Message-----
From: Benjamin Doron <benjamin.doro...@gmail.com>
Sent: Tuesday, September 06, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Oram, Isaac W
<isaac.w.o...@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desim...@intel.com>; Sinha, Ankit <ankit.si...@intel.com>; Ni, Ray
<ray...@intel.com>; Chiu, Chasel <chasel.c...@intel.com>; Luo, Heng
<heng....@intel.com>
Subject: [edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel:
Move PcdAcpiBaseAddress definition
All these platforms have an ABase, so move the definition to enable common
silicon code in IntelSiliconPkg. Otherwise, library shims would be required,
because PCDs are GUID-ed and package DEC specific.
Cc: Rangasai V Chaganty <rangasai.v.chaga...@intel.com>
Cc: Isaac Oram <isaac.w.o...@intel.com>
Cc: Nate DeSimone <nathaniel.l.desim...@intel.com>
Cc: Ankit Sinha <ankit.si...@intel.com>
Cc: Ray Ni <ray...@intel.com>
Cc: Chasel Chiu <chasel.c...@intel.com>
Cc: Sai Chaganty <rangasai.v.chaga...@intel.com>
Cc: Heng Luo <heng....@intel.com>
Signed-off-by: Benjamin Doron <benjamin.doro...@gmail.com>
---
.../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc | 1 +
.../Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
.../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 1 +
.../KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
.../Library/BasePlatformHookLib/BasePlatformHookLib.inf | 2 +-
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc | 1 +
.../Library/BasePlatformHookLib/BasePlatformHookLib.inf | 2 +-
.../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 1 +
.../TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc | 1 +
.../Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
.../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 1 +
.../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 1 +
Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc | 1 +
.../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf | 5 +++--
.../Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf | 3 ++-
.../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf | 2 +-
Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 1 -
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 ++++
Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc | 1 +
.../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf | 2 +-
.../Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf | 3 ++-
.../Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf | 2 +-
.../KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf | 2 +-
Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec | 1 -
.../IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf | 3 ++-
.../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf | 3 ++-
Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec | 1 -
Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc | 1 +
28 files changed, 34 insertions(+), 18 deletions(-)
diff --git
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
index 79924f1fda7f..81dc0747fab8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd
+++ .dsc
@@ -65,6 +65,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800 # # PCIe Reserved
Memory Space Range #diff --git
a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e3fdd3981653..c4dd863c3ee8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtS
+++ mm.inf
@@ -49,7 +49,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength ## CONSUMES
[FixedPcd]- gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Sources] TbtSmiHandler.hdiff --git
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index a4ea524e26bc..3ed7aa0a2b10 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg
+++ Pcd.dsc
@@ -241,6 +241,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 !endif
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e6c185a4bd91..13116488eaa0 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSm
+++ m.inf
@@ -46,7 +46,7 @@
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdSwSmiDTbtEnumerate ## CONSUMES
[FixedPcd]- gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Sources] TbtSmiHandler.hdiff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
index 1de10aa0080f..5f65f02a9f64 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BasePlatfor
+++ mHookLib/BasePlatformHookLib.inf
@@ -35,7 +35,7 @@
KabylakeSiliconPkg/SiPkg.dec [Pcd]-
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioIndexPort ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioDataPort ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioIndexDefaultPort ## CONSUMESdiff
--git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index c6b9df842936..ec23c691b2fe 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -194,6 +194,7 @@
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 !endif
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800 !if
gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 !endifdiff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
index 7a5e290657f2..8bdf13b1ce11 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BasePlatformHookLib/BasePlatformHookLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BasePlatf
+++ ormHookLib/BasePlatformHookLib.inf
@@ -35,7 +35,7 @@
KabylakeSiliconPkg/SiPkg.dec [Pcd]-
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioIndexPort ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioDataPort ## CONSUMES
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLpcSioIndexDefaultPort ## CONSUMESdiff
--git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 2f7765e58a69..cfd032814850 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d
+++ sc
@@ -194,6 +194,7 @@
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07 !endif
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800 !if
gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1 !endifdiff --git
a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc
b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc
index 2fd6d0c50e05..2fb2e1ce58f4 100644
--- a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd
+++ .dsc
@@ -117,6 +117,7 @@
#!if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection == 1
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000 #!endif+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeiStackSize|0x40000 #diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index bfe299d73374..83ebc790aeb4 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/Tb
+++ tSmm.inf
@@ -49,7 +49,7 @@
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength ## CONSUMES
[FixedPcd]- gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Sources] TbtSmiHandler.hdiff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
index a7e9a41e2c34..dbe068d0c123 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.ds
+++ c
@@ -65,6 +65,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
[PcdsFeatureFlag.common] ######################################diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
index daf5411ac358..451926d67190 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk
+++ gPcd.dsc
@@ -65,6 +65,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
[PcdsFeatureFlag.common] ######################################diff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
index c5f10492edc8..e62e37cda036 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc
@@ -42,6 +42,7 @@ gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable |FALSE
[PcdsFixedAtBuild.common] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
|0xE0000000 gSiPkgTokenSpaceGuid.PcdTemporaryPciExpressRegionLength
|0x10000000+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress |0x1800
gSiPkgTokenSpaceGuid.PcdSiliconInitTempPciBusMin |10
gSiPkgTokenSpaceGuid.PcdSiliconInitTempPciBusMax |18diff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
index 1534a24dd240..432d4c0c2656 100644
---
a/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Library/PeiSiliconInitLib/PeiSi
+++ liconInitLib.inf
@@ -32,6 +32,7 @@
[Packages] MdePkg/MdePkg.dec+ IntelSiliconPkg/IntelSiliconPkg.dec
CoffeelakeSiliconPkg/SiPkg.dec [Sources]@@ -42,5 +43,5 @@
gTcoWdtHobGuid ## CONSUMES [Pcd]-
gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES-
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress ## CONSUMES+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES+
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress ## CONSUMESdiff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
index 78e212eeb0fd..61778ed5a066 100644
---
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmPmcLib/Pei
+++ DxeSmmPmcLib.inf
@@ -32,11 +32,12 @@ BaseMemoryLib
[Packages] MdePkg/MdePkg.dec+IntelSiliconPkg/IntelSiliconPkg.dec
CoffeelakeSiliconPkg/SiPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
[Sources]diff --git
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf
b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf
index 573acfc25e31..1f84337afafb 100644
---
a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/PeiDxeSmmPm
+++ cPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf
@@ -39,7 +39,7 @@ CoffeelakeSiliconPkg/SiPkg.dec
IntelSiliconPkg/IntelSiliconPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
[Sources]diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
index efc2d8788168..ca3e83bd61da 100644
--- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec
@@ -516,7 +516,6 @@
gSiPkgTokenSpaceGuid.PcdMchBaseAddress|0xFED10000|UINT64|0x00010030
## This value is used to set the base address of PCH devices
gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress|0x0000EFA0|UINT16|0x00010031
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress|0x0400|UINT16|0x00010034-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800|UINT16|0x00010035
## 32KB window
gSiPkgTokenSpaceGuid.PcdMchMmioSize|0x8000|UINT32|0x50000000diff --git
a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index c36d130a0197..deefdc55b5d6 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -147,6 +147,10 @@
# @Prompt Error code for VTd error.
gIntelSiliconPkgTokenSpaceGuid.PcdErrorCodeVTdError|0x02008000|UINT32|0x00000005
+ ## ABase I/O address.<BR><BR>+ # @Prompt ABase I/O address.+
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x0|UINT16|0x0000000D+
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] ## This
is the GUID of the FFS which contains the Graphics Video BIOS Table (VBT) #
The VBT content is stored as a RAW section which is consumed by GOP PEI/UEFI
driver.diff --git a/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
b/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
index d980a2c5369a..ff7728279a08 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
+++ b/Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc
@@ -48,6 +48,7 @@ gSiPkgTokenSpaceGuid.PcdSiCatalogDebugEnable |FALSE
[PcdsFixedAtBuild.common] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
|0xE0000000 gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength
|0x10000000+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress |0x1800 # #
This DSC mainly for GreenH Silicon code build so PciExpressBaseAddress can be
FixedAtBuild #diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
index 3b94a02e6bf4..32205bb04f64 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconInitLib/PeiSiliconInitLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Library/PeiSiliconInitLib/PeiSili
+++ conInitLib.inf
@@ -46,7 +46,7 @@
SiliconInitPreMem.c [Pcd]- gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress
## CONSUMES+ gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
## CONSUMES gSiPkgTokenSpaceGuid.PcdTcoBaseAddress
## CONSUMES diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf
index 1e6103f4ca38..5ae3b4d6256a 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiDxeSmmPchPmcLib/Pe
+++ iDxeSmmPchPmcLib.inf
@@ -30,11 +30,12 @@ PchCycleDecodingLib
[Packages] MdePkg/MdePkg.dec+IntelSiliconPkg/IntelSiliconPkg.dec
KabylakeSiliconPkg/SiPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
[Sources]diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf
index a5ccf4698b7d..41eaffe52e66 100644
---
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiPchPolicyLib/PeiPc
+++ hPolicyLib.inf
@@ -35,7 +35,7 @@ KabylakeSiliconPkg/SiPkg.dec
IntelSiliconPkg/IntelSiliconPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress
gSiPkgTokenSpaceGuid.PcdSerialIoUartDebugEnable
gSiPkgTokenSpaceGuid.PcdSerialIoUartNumberdiff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
index ba57c44e1e12..f912d6e76d4a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.i
+++ nf
@@ -39,7 +39,7 @@
PeiSpiLib.c [Pcd]- gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress ##
CONSUMES+ gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress ## CONSUMES
[Ppis] gPchSpi2PpiGuid ## PRODUCESdiff --git
a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
index d9ae9f6dfd91..6c9af567f5ee 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec
@@ -497,7 +497,6 @@
gSiPkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|40|UINT8|0x0001002f
gSiPkgTokenSpaceGuid.PcdMchBaseAddress|0xFED10000|UINT64|0x00010030
gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress|0x0000EFA0|UINT16|0x00010031
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress|0x0400|UINT16|0x00010034-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800|UINT16|0x00010035
## 32KB window
gSiPkgTokenSpaceGuid.PcdMchMmioSize|0x8000|UINT32|0x50000000diff --git
a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
index eba6db767c5c..c52a157c7d39 100644
---
a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/Library/PeiDxeSmmPmc
+++ Lib/PeiDxeSmmPmcLib.inf
@@ -31,11 +31,12 @@ BaseMemoryLib
[Packages] MdePkg/MdePkg.dec+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress [Sources]diff --git
a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf
b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf
index 2bd57b79f035..32a4e9a07a76 100644
---
a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf
+++ b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Pmc/LibraryPrivate/PeiDx
+++ eSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf
@@ -27,11 +27,12 @@ PmcLib
[Packages] MdePkg/MdePkg.dec+IntelSiliconPkg/IntelSiliconPkg.dec
TigerlakeSiliconPkg/SiPkg.dec
[Pcd]-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress
[FixedPcd] diff --git a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
index 7cdbb3748155..991ca1555bf7 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
+++ b/Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec
@@ -976,7 +976,6 @@
gMeConfigSpaceGuid.PcdHeciTimeoutsEnabled|TRUE|BOOLEAN|0x50000002
## This value is used to set the base address of PCH devices
gSiPkgTokenSpaceGuid.PcdSmbusBaseAddress|0x0000EFA0|UINT16|0x00010031
gSiPkgTokenSpaceGuid.PcdTcoBaseAddress|0x0400|UINT16|0x00010033-gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800|UINT16|0x00010035
## Stack size in the temporary RAM.diff --git
a/Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc
b/Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc
index 36df41f09fb4..f11305d266cb 100644
--- a/Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc
+++ b/Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc
@@ -60,6 +60,7 @@ gSiPkgTokenSpaceGuid.PcdSpaEnable |FALSE
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress |0xC0000000
gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress
|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gSiPkgTokenSpaceGuid.PcdTemporaryPciExpressRegionLength
|0x10000000+gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress |0x1800
[PcdsDynamicDefault.common] gSiPkgTokenSpaceGuid.PcdPciExpressRegionLength
|0x10000000--
2.37.2
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