REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3954
Report error if reserved bits are not 0 for PageSize
Cc: Ray Ni <ray...@intel.com>
Cc: Hao Wu <hao.a...@intel.com>
Signed-off-by: Heng Luo <heng....@intel.com>
---
MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index b79499e225..381d7a9536 100644
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -1,7 +1,7 @@
/** @file
The XHCI controller driver.
-Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2011 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -1813,7 +1813,13 @@ XhcCreateUsbHc (
// This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
// if bit 0 is Set, the xHC supports 4k byte page sizes.
//
- PageSize = XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
+ PageSize = XhcReadOpReg (Xhc, XHC_PAGESIZE_OFFSET);
+ if ((PageSize & (~XHC_PAGESIZE_MASK)) != 0) {
+ DEBUG ((DEBUG_ERROR, "XhcCreateUsb3Hc: Reserved bits are not 0 for
PageSize\n"));
+ goto ON_ERROR;
+ }
+
+ PageSize &= XHC_PAGESIZE_MASK;
Xhc->PageSize = 1 << (HighBitSet32 (PageSize) + 12);
ExtCapReg = (UINT16)(Xhc->HcCParams.Data.ExtCapReg);
--
2.31.1.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#90608): https://edk2.groups.io/g/devel/message/90608
Mute This Topic: https://groups.io/mt/91872204/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-
