Set the location of the DUTY_CYCLE field in the P_CNT register
and indicate the width of the clock duty cycle to OS power management
Cc: Chasel Chiu <chasel.c...@intel.com>
Cc: Michael Kubacki <michael.kuba...@microsoft.com>
Cc: Benjamin Doron <benjamin.doro...@gmail.com>
Cc: Jeremy Soller <jer...@system76.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com>
---
.../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 9 ++++++++-
.../GalagoPro3/OpenBoardPkgPcd.dsc | 8 +++++++-
.../KabylakeRvp3/OpenBoardPkgPcd.dsc | 11 +++++++++--
3 files changed, 24 insertions(+), 4 deletions(-)
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index 21ee86403d..02080aa864 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
@@ -1,7 +1,7 @@
## @file
# PCD configuration build description file for the Aspire VN7-572G board.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -346,6 +346,13 @@
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2 # FIXME: Boot Guard and BIOS
Guard not present, measured boot enforcement checking code not present
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
+ #
+ # Set the location of the DUTY_CYCLE field in the P_CNT register
+ # and indicate the width of the clock duty cycle to OS power management
+ #
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
+
######################################
# Platform Configuration
######################################
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index 44dacdf082..dce4db17c2 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -1,7 +1,7 @@
## @file
# PCD configuration build description file for the GalagoPro3 board.
#
-# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -251,6 +251,12 @@
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
+ #
+ # Set the location of the DUTY_CYCLE field in the P_CNT register
+ # and indicate the width of the clock duty cycle to OS power management
+ #
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 725596cbf7..ccf757e202 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
@@ -1,7 +1,7 @@
## @file
# PCD configuration build description file for the KabylakeRvp3 board.
#
-# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -78,6 +78,7 @@
# so FSP needs more temporary memory for FSP heap + stack size.
#
gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
+
#
# FSP API mode does not need to enlarge the boot loader stack size
# since the stacks are separate.
@@ -290,6 +291,13 @@
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
+ #
+ # Set the location of the DUTY_CYCLE field in the P_CNT register
+ # and indicate the width of the clock duty cycle to OS power management
+ #
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
+ gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
+
######################################
# Platform Configuration
######################################
@@ -346,7 +354,6 @@
gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F,
0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
!endif
-
######################################
# Board Configuration
######################################
--
2.27.0.windows.1
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