Hi Ard,

Please find my response inline.

> -----Original Message-----
> From: Ard Biesheuvel <a...@kernel.org>
> Sent: Wednesday, April 20, 2022 1:05 PM
> To: Pranav Madhu <pranav.ma...@arm.com>
> Cc: edk2-devel-groups-io <devel@edk2.groups.io>; Ard Biesheuvel
> <ardb+tianoc...@kernel.org>; Sami Mujawar <sami.muja...@arm.com>
> Subject: Re: [edk2-platforms][PATCH V1 1/1] Platform/Sgi: Remove SLC entry
> from PPTT table
> 
> On Mon, 18 Apr 2022 at 10:14, Pranav Madhu <pranav.ma...@arm.com>
> wrote:
> >
> > Remove system level cache (SLC) entry from ACPI PPTT table. SLC on the
> > Neoverse reference design platforms is the memory side cache and so it
> > is removed from PPTT table.
> >
> 
> Could you elaborate? Why does the former justify/imply the latter?

The SLC cache in Neoverse reference design is not a processor resource, instead 
it is an interconnect resource. As PPTT is used to describe the processor 
topology and processor resources, it is better to remove the SLC cache from 
PPTT and the best place for SLC is HMAT/SRAT tables.

> 
> > Signed-off-by: Pranav Madhu <pranav.ma...@arm.com>
> > ---
> >  Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h         |  4 +---
> >  Platform/ARM/SgiPkg/AcpiTables/RdE1Edge/Pptt.aslc   | 24 
> > +++-----------------
> >  Platform/ARM/SgiPkg/AcpiTables/RdN1Edge/Pptt.aslc   | 20 +++-------------
> >  Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Pptt.aslc | 23 +++---------------
> -
> >  Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc       | 21 ++++-------------
> >  Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/Pptt.aslc   | 21 ++++-------------
> >  Platform/ARM/SgiPkg/AcpiTables/RdV1/Pptt.aslc       | 21 ++++-------------
> >  Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Pptt.aslc     | 23 
> > ++++---------------
> >  8 files changed, 26 insertions(+), 131 deletions(-)
> >
> > Link to github branch for this patch -
> > https://github.com/Pranav-Madhu/edk2-platforms/tree/topics/remove_slc_
> > from_pptt
> >

<...>

Regards,
Pranav


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