https://bugzilla.tianocore.org/show_bug.cgi?id=3860
RiscVOpensbiTypes.h:
The header file for building RISC-V OpenSBI library.
RiscVOpenSBI.h:
The header file of using OpenSBI library.
Signed-off-by: Abner Chang <abner.ch...@hpe.com>
Co-authored-by: Daniel Schaefer <daniel.schae...@hpe.com>
M: Liming Gao <gaolim...@byosoft.com.cn> [lgao4]
R: Zhiguang Liu <zhiguang....@intel.com> [LiuZhiguang001]
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Leif Lindholm <quic_llind...@quicinc.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Chao Li <lic...@loongson.cn>
---
.../Include/IndustryStandard/RiscVOpensbi.h | 62 ++++++++++++++
.../IndustryStandard/RiscVOpensbiTypes.h | 82 +++++++++++++++++++
MdePkg/MdePkg.ci.yaml | 2 +
3 files changed, 146 insertions(+)
create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbi.h
create mode 100644 MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
diff --git a/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
b/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
new file mode 100644
index 0000000000..4c9186f212
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/RiscVOpensbi.h
@@ -0,0 +1,62 @@
+/** @file
+ SBI inline function calls.
+
+ Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef EDK2_RISC_V_SBI_H_
+#define EDK2_RISC_V_SBI_H_
+
+#include <RiscVImpl.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_atomic.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_error.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_types.h>
+#include <sbi/sbi_hartmask.h>
+
+#define RISC_V_MAX_HART_SUPPORTED SBI_HARTMASK_MAX_BITS
+
+typedef
+VOID
+(EFIAPI *RISCV_HART_SWITCH_MODE)(
+ IN UINTN FuncArg0,
+ IN UINTN FuncArg1,
+ IN UINTN NextAddr,
+ IN UINTN NextMode,
+ IN BOOLEAN NextVirt
+ );
+
+//
+// Keep the structure member in 64-bit alignment.
+//
+typedef struct {
+ UINT64 IsaExtensionSupported; // The ISA extension this
core supported.
+ RISCV_UINT128 MachineVendorId; // Machine vendor ID
+ RISCV_UINT128 MachineArchId; // Machine Architecture ID
+ RISCV_UINT128 MachineImplId; // Machine Implementation ID
+ RISCV_HART_SWITCH_MODE HartSwitchMode; // OpenSBI's function to
switch the mode of a hart
+} EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC;
+#define FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE (64 * 8) // This is the size of
EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
+ // structure. Referred
by both C code and assembly code.
+
+typedef struct {
+ UINT64 BootHartId;
+ VOID *PeiServiceTable; // PEI
Service table
+ UINT64 FlattenedDeviceTree; // Pointer
to Flattened Device tree
+ UINT64 SecPeiHandOffData; // This is
EFI_SEC_PEI_HAND_OFF passed to PEI Core.
+ EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC
*HartSpecific[RISC_V_MAX_HART_SUPPORTED];
+} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
+
+//
+// Typedefs of OpenSBI type to make them conform to EDK2 coding guidelines
+//
+typedef struct sbi_scratch SBI_SCRATCH;
+typedef struct sbi_platform SBI_PLATFORM;
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
b/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
new file mode 100644
index 0000000000..6a6a1f532d
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/RiscVOpensbiTypes.h
@@ -0,0 +1,82 @@
+/** @file
+ RISC-V OpenSBI header file reference.
+
+ Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights
reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef EDK2_RISC_V_SBI_TYPES_H_
+#define EDK2_RISC_V_SBI_TYPES_H_
+
+#include <Base.h>
+
+typedef INT8 s8;
+typedef UINT8 u8;
+typedef UINT8 uint8_t;
+
+typedef INT16 s16;
+typedef UINT16 u16;
+typedef INT16 int16_t;
+typedef UINT16 uint16_t;
+
+typedef INT32 s32;
+typedef UINT32 u32;
+typedef INT32 int32_t;
+typedef UINT32 uint32_t;
+
+typedef INT64 s64;
+typedef UINT64 u64;
+typedef INT64 int64_t;
+typedef UINT64 uint64_t;
+
+// PRILX is not used in EDK2 but we need to define it here because when
+// defining our own types, this constant is not defined but used by OpenSBI.
+#define PRILX "016lx"
+
+typedef BOOLEAN bool;
+typedef unsigned long ulong;
+typedef UINT64 uintptr_t;
+typedef UINT64 size_t;
+typedef INT64 ssize_t;
+typedef UINT64 virtual_addr_t;
+typedef UINT64 virtual_size_t;
+typedef UINT64 physical_addr_t;
+typedef UINT64 physical_size_t;
+
+#define true TRUE
+#define false FALSE
+
+#define __packed __attribute__((packed))
+#define __noreturn __attribute__((noreturn))
+#define __aligned(x) __attribute__((aligned(x)))
+
+#if defined (__GNUC__) || defined (__clang__)
+#define likely(x) __builtin_expect((x), 1)
+#define unlikely(x) __builtin_expect((x), 0)
+#else
+#define likely(x) (x)
+#define unlikely(x) (x)
+#endif
+
+#undef offsetof
+#ifdef __compiler_offsetof
+#define offsetof(TYPE, MEMBER) __compiler_offsetof(TYPE,MEMBER)
+#else
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+#endif
+
+#define container_of(ptr, type, member) ({ \
+ const typeof(((type *)0)->member) * __mptr = (ptr); \
+ (type *)((char *)__mptr - offsetof(type, member)); })
+
+#define array_size(x) (sizeof(x) / sizeof((x)[0]))
+
+#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
+#define ROUNDUP(a, b) ((((a)-1) / (b) + 1) * (b))
+#define ROUNDDOWN(a, b) ((a) / (b) * (b))
+
+/* clang-format on */
+
+#endif
diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml
index 054233ebc7..7c05fb913f 100644
--- a/MdePkg/MdePkg.ci.yaml
+++ b/MdePkg/MdePkg.ci.yaml
@@ -50,6 +50,8 @@
"Include/IndustryStandard/Tpm20.h",
"Include/IndustryStandard/IoRemappingTable.h",
"Include/IndustryStandard/UefiTcgPlatform.h",
+ "Include/IndustryStandard/RiscVOpensbi.h",
+ "Include/IndustryStandard/RiscVOpensbiTypes.h",
"Include/Library/PcdLib.h",
"Include/Library/SafeIntLib.h",
"Test/UnitTest/Library/BaseSafeIntLib/TestBaseSafeIntLib.c"
--
2.31.1
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