Hi,
> Another update is in PlatformAddressWidthInitialization. The physical
> address width that Tdx guest supports is either 48 or 52.
Hmm. Sure this is correct?
48 is the max _virtual_ address space possible with 4-level paging.
The _physical_ address space might be much smaller, like this
(kaby lake desktop system):
# lscpu
Architecture: x86_64
CPU op-mode(s): 32-bit, 64-bit
Address sizes: 39 bits physical, 48 bits virtual
Byte Order: Little Endian
Maybe all TDX-capable Intel CPUs actually have >= 48 bits physical,
so this could be fine, but please double-check.
thanks,
Gerd
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