The patch series enables CCIX port as PCIe root on N1SDP. V2: - Removed few PCDs entries that were not used. - Migrated to latest version edk2-platform and validated the patches.
V1: - The PciExpressLib is updated to validate the PCIe addresses and introducing corresponding PCD entries. - A custom PCI Segment library is adapted from SynQuacerPciSegmentLib and ported for N1Sdp. - The root complex node info in PciHostBridge library is updated to include the CCIX port information. The changes can be seen at: https://github.com/khasim/edk2-platforms-n1sdp/tree/n1sdp-ccix-root Khasim Syed Mohammed (3): Silicon/ARM/NeoverseN1Soc: Update PciExpressLib to enable CCIX port Silicon/ARM/NeoverseN1Soc: Port PCI Segment Library Silicon/ARM/NeoverseN1Soc: Add CCIX root complex support .../ConfigurationManagerDxe.inf | 3 +- Platform/ARM/N1Sdp/N1SdpPlatform.dec | 3 - Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 3 +- .../PciExpressLib.c | 127 +- .../PciExpressLib.inf | 7 +- .../PciHostBridgeLib/PciHostBridgeLib.c | 71 +- .../PciHostBridgeLib/PciHostBridgeLib.inf | 11 +- .../Library/PciSegmentLib/PciSegmentLib.c | 1425 +++++++++++++++++ .../Library/PciSegmentLib/PciSegmentLib.inf | 35 + .../Library/PlatformLib/PlatformLib.inf | 1 + .../Library/PlatformLib/PlatformLibMem.c | 4 +- Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 +- 12 files changed, 1635 insertions(+), 60 deletions(-) create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.c create mode 100644 Silicon/ARM/NeoverseN1Soc/Library/PciSegmentLib/PciSegmentLib.inf -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#83939): https://edk2.groups.io/g/devel/message/83939 Mute This Topic: https://groups.io/mt/87257271/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
