According to SMBIOS 3.4, section 7.5.3.3 ARM64-class CPUs, if SMCCC_ARCH_SOC_ID is supported, the first DWORD is the JEP-106 code and the second DWORD is the SoC revision value. But in the current implementation, they are set in reverse. This patch is to correct it.
Cc: Leif Lindholm <l...@nuviainc.com> Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org> Cc: Rebecca Cran <rebe...@nuviainc.com> Signed-off-by: Nhi Pham <n...@os.amperecomputing.com> --- ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c index 292f10bf97eb..d644cd33d249 100644 --- a/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c +++ b/ArmPkg/Universal/Smbios/ProcessorSubClassDxe/SmbiosProcessorArmCommon.c @@ -2,6 +2,7 @@ Functions for processor information common to ARM and AARCH64. Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR> + Copyright (c) 2021, Ampere Computing LLC. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-Patent @@ -171,7 +172,7 @@ SmbiosGetProcessorId ( if (HasSmcArm64SocId ()) { SmbiosGetSmcArm64SocId (&Jep106Code, &SocRevision); - ProcessorId = ((UINT64)Jep106Code << 32) | SocRevision; + ProcessorId = ((UINT64)SocRevision << 32) | Jep106Code; } else { ProcessorId = ArmReadMidr (); } -- 2.17.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#80698): https://edk2.groups.io/g/devel/message/80698 Mute This Topic: https://groups.io/mt/85627881/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-