Hi Brijesh
I think it is OK to leave MpFunc.nasm in this series.
We can revisit later.

Thank you
Yao Jiewen

> -----Original Message-----
> From: Brijesh Singh <brijesh.si...@amd.com>
> Sent: Monday, September 13, 2021 6:56 AM
> To: Yao, Jiewen <jiewen....@intel.com>; devel@edk2.groups.io
> Cc: James Bottomley <j...@linux.ibm.com>; Xu, Min M <min.m...@intel.com>;
> Tom Lendacky <thomas.lenda...@amd.com>; Justen, Jordan L
> <jordan.l.jus...@intel.com>; Ard Biesheuvel <ardb+tianoc...@kernel.org>;
> Erdem Aktas <erdemak...@google.com>; Michael Roth
> <michael.r...@amd.com>; Gerd Hoffmann <kra...@redhat.com>
> Subject: Re: [PATCH v6 00/29] Add AMD Secure Nested Paging (SEV-SNP)
> support
> 
> Hi Yao,
> 
> I am going through implementing your feedback. I have covered most of
> it. But your comment on moving some of the changes from MpFunc.nasm to
> Sev.nasm may make code harder to read. It is mainly because the GPA
> registration and Topo check are not self-contained routines. They depend
> on some previous register states and need to jump to different paths
> based on the condition. All those jump are in generic AP init routines.
> 
> As you can see, the changes in MpFunc.nasm are more petite, and if it's
> a big issue, we can revisit it later and devise a proposal to move the
> big chunk of generic code in a separate file then have TDX and SEV call
> into it. At that time, we can add OneTimeCall or OneTimeReturn macros
> etc., to jump between different files to make it more readable. Would
> you please let me know if that is acceptable?
> 
> -Brijesh
> 
> On 9/6/21 9:36 PM, Yao, Jiewen wrote:
> >
> > 0023-UefiCpuPkg-MpLib-add-support-to-register-GHCB-GPA-when-SEV-SNP-
> is-enabled
> > 1) See 0008.
> > 2) For MpFuncs.nasm, I recommend to move AmdSev specific initialization to a
> standalone file, such as Sev.nasm
> >
> > 0024-UefiCpuPkg-MpInitLib-use-BSP-to-do-extended-topology-check
> > See 0023
> >


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