> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> zhoucheng
> Sent: Thursday, August 19, 2021 3:31 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kin...@intel.com>; Liming Gao
> <gaolim...@byosoft.com.cn>; Liu, Zhiguang <zhiguang....@intel.com>
> Subject: [edk2-devel] [PATCH v1 1/2] MdePkg:Update
> IndustryStandard/Nvme.h with Nvme amdin controller data
>
> Update Nvme data structure
>
> Signed-off-by: Cheng Zhou <zhouch...@phytium.com.cn>
> Reviewed-by: Liming Gao <gaolim...@byosoft.com.cn>
>
> Cc: Michael D Kinney <michael.d.kin...@intel.com>
> Cc: Liming Gao <gaolim...@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang....@intel.com>
> ---
> MdePkg/Include/IndustryStandard/Nvme.h | 11 ++++++++++-
> 1 file changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/MdePkg/Include/IndustryStandard/Nvme.h
> b/MdePkg/Include/IndustryStandard/Nvme.h
> index 9b19a2074b0d..f7a1a9f6ca32 100644
> --- a/MdePkg/Include/IndustryStandard/Nvme.h
> +++ b/MdePkg/Include/IndustryStandard/Nvme.h
> @@ -353,7 +353,16 @@ typedef struct {
> UINT8 Npss; /* Number of Power States Support */
> UINT8 Avscc; /* Admin Vendor Specific Command Configuration
> */
> UINT8 Apsta; /* Autonomous Power State Transition
> Attributes */
> - UINT8 Rsvd2[246]; /* Reserved as of Nvm Express 1.1 Spec */
> + //
> + // Below fields before Rsvd2 are defined in NVM Express 1.3 Spec //
> + UINT16 Wctemp; /* Warning Composite Temperature Threshold */
> + UINT16 Cctemp; /* Critical Composite Temperature Threshold */
> + UINT16 Mtfa; /* Maximum Time for Firmware Activation */
> + UINT32 Hmpre; /* Host Memory Buffer Preferred Size */
> + UINT32 Hmmin; /* Host Memory Buffer Minimum Size */
> + UINT8 Tnvmcap[16]; /* Total NVM Capacity */
> + UINT8 Rsvd2[216]; /* Reserved as of NVM Express */
Reviewed-by: Hao A Wu <hao.a...@intel.com>
Best Regards,
Hao Wu
> //
> // NVM Command Set Attributes
> //
> --
> 2.17.1
>
>
>
>
>
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