Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
> -----Original Message----- > From: mikub...@linux.microsoft.com <mikub...@linux.microsoft.com> > Sent: Friday, June 18, 2021 10:07 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel <chasel.c...@intel.com>; Chaganty, Rangasai V > <rangasai.v.chaga...@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desim...@intel.com> > Subject: [edk2-platforms][PATCH v3 32/41] CoffeelakeSiliconPkg: Remove PCH > SPI PPI and Protocol from package > > From: Michael Kubacki <michael.kuba...@microsoft.com> > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3307 > > The following PPI and Protocols have moved to IntelSiliconPkg. The remaining > definitions in CoffeelakeSiliconPkg are removed and libs/ modules that need to > reference IntelSiliconPkg are updated. > > 1. gPchSpiProtocolGuid > 2. gPchSmmSpiProtocolGuid > 3. gPchSpiPpiGuid > > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Signed-off-by: Michael Kubacki <michael.kuba...@microsoft.com> > Reviewed-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > --- > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h > | 27 -- > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h > | 295 -------------------- > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > | 1 + > > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib/ > BasePchSpiCommonLib.inf | 1 + > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf > | 1 + > Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec > | 3 - > 6 files changed, 3 insertions(+), 325 deletions(-) > > diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h > deleted file mode 100644 > index d3ff152742cf..000000000000 > --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Ppi/Spi.h > +++ /dev/null > @@ -1,27 +0,0 @@ > -/** @file > - This file defines the PCH SPI PPI which implements the > - Intel(R) PCH SPI Host Controller Compatibility Interface. > - > - Copyright (c) 2019 Intel Corporation. All rights reserved. <BR> > - > - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ > - > -#ifndef _PCH_SPI_PPI_H_ > -#define _PCH_SPI_PPI_H_ > - > -#include <Protocol/Spi.h> > - > -// > -// Extern the GUID for PPI users. > -// > -extern EFI_GUID gPchSpiPpiGuid; > - > -/** > - Reuse the PCH_SPI_PROTOCOL definitions > - This is possible becaues the PPI implementation does not rely on a > PeiService > pointer, > - as it uses EDKII Glue Lib to do IO accesses -**/ -typedef PCH_SPI_PROTOCOL > PCH_SPI_PPI; > - > -#endif > diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h > deleted file mode 100644 > index 22df7fe35147..000000000000 > --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Protocol/Spi.h > +++ /dev/null > @@ -1,295 +0,0 @@ > -/** @file > - This file defines the PCH SPI Protocol which implements the > - Intel(R) PCH SPI Host Controller Compatibility Interface. > - > - Copyright (c) 2019 Intel Corporation. All rights reserved. <BR> > - > - SPDX-License-Identifier: BSD-2-Clause-Patent -**/ > - > -#ifndef _PCH_SPI_PROTOCOL_H_ > -#define _PCH_SPI_PROTOCOL_H_ > - > -// > -// Extern the GUID for protocol users. > -// > -extern EFI_GUID gPchSpiProtocolGuid; > -extern EFI_GUID gPchSmmSpiProtocolGuid; > - > -// > -// Forward reference for ANSI C compatibility -// -typedef struct > _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL; > - > -// > -// SPI protocol data structures and definitions -// > - > -/** > - Flash Region Type > -**/ > -typedef enum { > - FlashRegionDescriptor, > - FlashRegionBios, > - FlashRegionMe, > - FlashRegionGbE, > - FlashRegionPlatformData, > - FlashRegionDer, > - FlashRegionEC = 8, > - FlashRegionAll, > - FlashRegionMax > -} FLASH_REGION_TYPE; > - > -// > -// Protocol member functions > -// > - > -/** > - Read data from the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] FlashRegionType The Flash Region type for flash cycle > which is > listed in the Descriptor. > - @param[in] Address The Flash Linear Address must fall within > a region > for which BIOS has access permissions. > - @param[in] ByteCount Number of bytes in the data portion of the > SPI > cycle. > - @param[out] Buffer The Pointer to caller-allocated buffer > containing > the dada received. > - It is the caller's responsibility to make > sure Buffer is large > enough for the total number of bytes read. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_READ) ( > - IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > - IN UINT32 Address, > - IN UINT32 ByteCount, > - OUT UINT8 *Buffer > - ); > - > -/** > - Write data to the flash part. Remark: Erase may be needed before write to > the > flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] FlashRegionType The Flash Region type for flash cycle > which is > listed in the Descriptor. > - @param[in] Address The Flash Linear Address must fall within > a region > for which BIOS has access permissions. > - @param[in] ByteCount Number of bytes in the data portion of the > SPI > cycle. > - @param[in] Buffer Pointer to caller-allocated buffer > containing the > data sent during the SPI cycle. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_WRITE) ( > - IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > - IN UINT32 Address, > - IN UINT32 ByteCount, > - IN UINT8 *Buffer > - ); > - > -/** > - Erase some area on the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] FlashRegionType The Flash Region type for flash cycle > which is > listed in the Descriptor. > - @param[in] Address The Flash Linear Address must fall within > a region > for which BIOS has access permissions. > - @param[in] ByteCount Number of bytes in the data portion of the > SPI > cycle. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_ERASE) ( > - IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > - IN UINT32 Address, > - IN UINT32 ByteCount > - ); > - > -/** > - Read SFDP data from the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] ComponentNumber The Componen Number for chip select > - @param[in] Address The starting byte address for SFDP data > read. > - @param[in] ByteCount Number of bytes in SFDP data portion of > the SPI > cycle > - @param[out] SfdpData The Pointer to caller-allocated buffer > containing > the SFDP data received > - It is the caller's responsibility to make > sure Buffer is large > enough for the total number of bytes read > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_READ_SFDP) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT8 ComponentNumber, > - IN UINT32 Address, > - IN UINT32 ByteCount, > - OUT UINT8 *SfdpData > - ); > - > -/** > - Read Jedec Id from the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] ComponentNumber The Componen Number for chip select > - @param[in] ByteCount Number of bytes in JedecId data portion of > the > SPI cycle, the data size is 3 typically > - @param[out] JedecId The Pointer to caller-allocated buffer > containing > JEDEC ID received > - It is the caller's responsibility to make > sure Buffer is large > enough for the total number of bytes read. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT8 ComponentNumber, > - IN UINT32 ByteCount, > - OUT UINT8 *JedecId > - ); > - > -/** > - Write the status register in the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] ByteCount Number of bytes in Status data portion of > the SPI > cycle, the data size is 1 typically > - @param[in] StatusValue The Pointer to caller-allocated buffer > containing > the value of Status register writing > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT32 ByteCount, > - IN UINT8 *StatusValue > - ); > - > -/** > - Read status register in the flash part. > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] ByteCount Number of bytes in Status data portion of > the SPI > cycle, the data size is 1 typically > - @param[out] StatusValue The Pointer to caller-allocated buffer > containing the value of Status register received. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_FLASH_READ_STATUS) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT32 ByteCount, > - OUT UINT8 *StatusValue > - ); > - > -/** > - Get the SPI region base and size, based on the enum type > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] FlashRegionType The Flash Region type for for the base > address which is listed in the Descriptor. > - @param[out] BaseAddress The Flash Linear Address for the Region 'n' > Base > - @param[out] RegionSize The size for the Region 'n' > - > - @retval EFI_SUCCESS Read success > - @retval EFI_INVALID_PARAMETER Invalid region type given > - @retval EFI_DEVICE_ERROR The region is not used > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) ( > - IN PCH_SPI_PROTOCOL *This, > - IN FLASH_REGION_TYPE FlashRegionType, > - OUT UINT32 *BaseAddress, > - OUT UINT32 *RegionSize > - ); > - > -/** > - Read PCH Soft Strap Values > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] SoftStrapAddr PCH Soft Strap address offset from FPSBA. > - @param[in] ByteCount Number of bytes in SoftStrap data portion > of the > SPI cycle > - @param[out] SoftStrapValue The Pointer to caller-allocated buffer > containing PCH Soft Strap Value. > - If the value of ByteCount is 0, the data > type of > SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap > Length > - It is the caller's responsibility to make > sure Buffer is large > enough for the total number of bytes read. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT32 SoftStrapAddr, > - IN UINT32 ByteCount, > - OUT VOID *SoftStrapValue > - ); > - > -/** > - Read CPU Soft Strap Values > - > - @param[in] This Pointer to the PCH_SPI_PROTOCOL instance. > - @param[in] SoftStrapAddr CPU Soft Strap address offset from FCPUSBA. > - @param[in] ByteCount Number of bytes in SoftStrap data portion > of the > SPI cycle. > - @param[out] SoftStrapValue The Pointer to caller-allocated buffer > containing CPU Soft Strap Value. > - If the value of ByteCount is 0, the data > type of > SoftStrapValue should be UINT16 and SoftStrapValue will be PCH Soft Strap > Length > - It is the caller's responsibility to make > sure Buffer is large > enough for the total number of bytes read. > - > - @retval EFI_SUCCESS Command succeed. > - @retval EFI_INVALID_PARAMETER The parameters specified are not valid. > - @retval EFI_DEVICE_ERROR Device error, command aborts abnormally. > -**/ > -typedef > -EFI_STATUS > -(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) ( > - IN PCH_SPI_PROTOCOL *This, > - IN UINT32 SoftStrapAddr, > - IN UINT32 ByteCount, > - OUT VOID *SoftStrapValue > - ); > - > -/** > - These protocols/PPI allows a platform module to perform SPI operations > through the > - Intel PCH SPI Host Controller Interface. > -**/ > -struct _PCH_SPI_PROTOCOL { > - /** > - This member specifies the revision of this structure. This field is used > to > - indicate backwards compatible changes to the protocol. > - **/ > - UINT8 Revision; > - PCH_SPI_FLASH_READ FlashRead; ///< Read data from > the flash > part. > - PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data to > the flash > part. Remark: Erase may be needed before write to the flash part. > - PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some area > on the > flash part. > - PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP data > from the flash part. > - PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec Id > from the flash part. > - PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the status > register in the flash part. > - PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status > register in the flash part. > - PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI > region base and size > - PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH Soft > Strap Values > - PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU Soft > Strap Values > -}; > - > -/** > - PCH SPI PPI/PROTOCOL revision number > - > - Revision 1: Initial version > -**/ > -#define PCH_SPI_SERVICES_REVISION 1 > - > -#endif > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > index fb2fad78d39e..4e4b456574f0 100644 > --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib > +++ .inf > @@ -30,6 +30,7 @@ [LibraryClasses] > > [Packages] > MdePkg/MdePkg.dec > +IntelSiliconPkg/IntelSiliconPkg.dec > CoffeelakeSiliconPkg/SiPkg.dec > > > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib > /BasePchSpiCommonLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib > /BasePchSpiCommonLib.inf > index ea23e628c80e..f5dc4ee0bfef 100644 > --- > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiCommonLib > /BasePchSpiCommonLib.inf > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/Private/BasePchSpiC > +++ ommonLib/BasePchSpiCommonLib.inf > @@ -20,6 +20,7 @@ [Sources] > > [Packages] > MdePkg/MdePkg.dec > + IntelSiliconPkg/IntelSiliconPkg.dec > CoffeelakeSiliconPkg/SiPkg.dec > > [LibraryClasses] > diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf > index 77bd3ad72bff..231929151222 100644 > --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Spi/Smm/PchSpiSmm.inf > @@ -29,6 +29,7 @@ [LibraryClasses] > > [Packages] > MdePkg/MdePkg.dec > +IntelSiliconPkg/IntelSiliconPkg.dec > CoffeelakeSiliconPkg/SiPkg.dec > > > diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec > b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec > index 5ea6fbb28411..efc2d8788168 100644 > --- a/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec > @@ -303,11 +303,9 @@ [Protocols] > ## > ## PCH > ## > -gPchSpiProtocolGuid = {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe, 0x26, > 0x9d, 0xe, 0xf3, 0x4a}} gWdtProtocolGuid = {0xb42b8d12, 0x2acb, 0x499a, > {0xa9, 0x20, 0xdd, 0x5b, 0xe6, 0xcf, 0x09, 0xb1}} > gPchSerialIoUartDebugInfoProtocolGuid = {0x2fd2b1bd, 0x0387, 0x4ec6, {0x94, > 0x1f, 0xf1, 0x4b, 0x7f, 0x1c, 0x94, 0xb6}} gEfiSmmSmbusProtocolGuid = > {0x72e40094, 0x2ee1, 0x497a, {0x8f, 0x33, 0x4c, 0x93, 0x4a, 0x9e, 0x9c, 0x0c}} > -gPchSmmSpiProtocolGuid = {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0xdf, > 0x1, 0x9d, 0x72, 0xc7, 0xe1}} gPchSmmIoTrapControlGuid = {0x514d2afd, > 0x2096, 0x4283, {0x9d, 0xa6, 0x70, 0x0c, 0xd2, 0x7d, 0xc7, 0xa5}} > gPchTcoSmiDispatchProtocolGuid = {0x9e71d609, 0x6d24, 0x47fd, {0xb5, 0x72, > 0x61, 0x40, 0xf8, 0xd9, 0xc2, 0xa4}} gPchPcieSmiDispatchProtocolGuid = > {0x3e7d2b56, 0x3f47, 0x42aa, {0x8f, 0x6b, 0x22, 0xf5, 0x19, 0x81, 0x8d, 0xab}} > @@ -382,7 +380,6 @@ [Ppis] ## PCH ## gWdtPpiGuid = {0xf38d1338, 0xaf7a, > 0x4fb6, {0x91, 0xdb, 0x1a, 0x9c, 0x21, 0x83, 0x57, 0x0d}} -gPchSpiPpiGuid = > {0xdade7ce3, 0x6971, 0x4b75, {0x82, 0x5e, 0xe, 0xe0, 0xeb, 0x17, 0x72, 0x2d}} > gPeiSmbusPolicyPpiGuid = {0x63b6e435, 0x32bc, 0x49c6, {0x81, 0xbd, 0xb7, > 0xa1, 0xa0, 0xfe, 0x1a, 0x6c}} gPchResetCallbackPpiGuid = {0x17865dc0, > 0x0b8b, 0x4da8, {0x8b, 0x42, 0x7c, 0x46, 0xb8, 0x5c, 0xca, 0x4d}} > > -- > 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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