From: Vu Nguyen <vungu...@os.amperecomputing.com>
Helps to show various system information like CPU info and Board Setting
values to UART console during boot process.
Cc: Thang Nguyen <th...@os.amperecomputing.com>
Cc: Chuong Tran <chu...@os.amperecomputing.com>
Cc: Phong Vo <ph...@os.amperecomputing.com>
Cc: Leif Lindholm <l...@nuviainc.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Ard Biesheuvel <ardb+tianoc...@kernel.org>
Cc: Nate DeSimone <nathaniel.l.desim...@intel.com>
Signed-off-by: Vu Nguyen <vungu...@os.amperecomputing.com>
---
Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc | 1 +
Platform/Ampere/JadePkg/Jade.fdf | 2 +
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf | 41 ++++
Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c | 230
++++++++++++++++++++
4 files changed, 274 insertions(+)
diff --git a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
index 930bbb5d385b..2d380b21df24 100755
--- a/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
+++ b/Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dsc.inc
@@ -534,6 +534,7 @@ [Components.common]
ArmPlatformPkg/PlatformPei/PlatformPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/ATFHobPei/ATFHobPeim.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MemoryInitPeim/MemoryInitPeim.inf
+ Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/MmCommunicationPei/MmCommunicationPei.inf
Silicon/Ampere/AmpereAltraPkg/Drivers/FlashPei/FlashPei.inf
ArmPkg/Drivers/CpuPei/CpuPei.inf
diff --git a/Platform/Ampere/JadePkg/Jade.fdf b/Platform/Ampere/JadePkg/Jade.fdf
index 3d5d857178b3..8c09e2a49089 100755
--- a/Platform/Ampere/JadePkg/Jade.fdf
+++ b/Platform/Ampere/JadePkg/Jade.fdf
@@ -167,6 +167,8 @@ [FV.FVMAIN_COMPACT]
#
# Print platform information before passing control into the Driver
Execution Environment (DXE) phase
#
+ INF Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
+
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
diff --git
a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
new file mode 100755
index 000000000000..11414f72f369
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.inf
@@ -0,0 +1,41 @@
+## @file
+#
+# Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = DebugInfo
+ FILE_GUID = C0571D26-6176-11E9-8647-D663BD873D93
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = DebugInfoPeiEntryPoint
+
+[Sources]
+ DebugInfoPei.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Ampere/AmpereAltraPkg/AmpereAltraPkg.dec
+ Silicon/Ampere/AmpereSiliconPkg/AmpereSiliconPkg.dec
+
+[LibraryClasses]
+ AmpereCpuLib
+ ArmLib
+ HobLib
+ NVParamLib
+ PeimEntryPoint
+ PrintLib
+ SerialPortLib
+
+[Guids]
+ gPlatformHobGuid
+
+[Depex]
+ TRUE
diff --git a/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
new file mode 100644
index 000000000000..d6775ffa4a79
--- /dev/null
+++ b/Silicon/Ampere/AmpereAltraPkg/Drivers/DebugInfoPei/DebugInfoPei.c
@@ -0,0 +1,230 @@
+/** @file
+
+ Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Uefi.h>
+
+#include <Guid/PlatformInfoHobGuid.h>
+#include <Library/AmpereCpuLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/IoLib.h>
+#include <Library/NVParamLib.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/PrintLib.h>
+#include <Library/SerialPortLib.h>
+#include <NVParamDef.h>
+#include <Pcie.h>
+#include <PlatformInfoHob.h>
+
+#define MAX_PRINT_LEN 512
+
+#define GB_SCALE_FACTOR 1073741824
+#define MB_SCALE_FACTOR 1048576
+#define KB_SCALE_FACTOR 1024
+#define MHZ_SCALE_FACTOR 1000000
+
+STATIC VOID
+SerialPrint (
+ IN CONST CHAR8 *FormatString,
+ ...
+ )
+{
+ CHAR8 Buf[MAX_PRINT_LEN];
+ VA_LIST Marker;
+ UINTN NumberOfPrinted;
+
+ VA_START (Marker, FormatString);
+ NumberOfPrinted = AsciiVSPrint (Buf, sizeof (Buf), FormatString, Marker);
+ SerialPortWrite ((UINT8 *)Buf, NumberOfPrinted);
+ VA_END (Marker);
+}
+
+/**
+ Print any existence NVRAM.
+**/
+STATIC VOID
+PrintNVRAM (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ NVPARAM Idx;
+ UINT32 Val;
+ UINT16 ACLRd = NV_PERM_ALL;
+ BOOLEAN Flag;
+
+ Flag = FALSE;
+ for (Idx = NV_PREBOOT_PARAM_START; Idx <= NV_PREBOOT_PARAM_MAX; Idx +=
NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Pre-boot Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_MANU_PARAM_START; Idx <= NV_MANU_PARAM_MAX; Idx +=
NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Manufacturer Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_USER_PARAM_START; Idx <= NV_USER_PARAM_MAX; Idx +=
NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("User Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+
+ Flag = FALSE;
+ for (Idx = NV_BOARD_PARAM_START; Idx <= NV_BOARD_PARAM_MAX; Idx +=
NVPARAM_SIZE) {
+ Status = NVParamGet (Idx, ACLRd, &Val);
+ if (!EFI_ERROR (Status)) {
+ if (!Flag) {
+ SerialPrint ("Board Configuration Setting:\n");
+ Flag = TRUE;
+ }
+ SerialPrint (" %04X: 0x%X (%d)\n", (UINT32)Idx, Val, Val);
+ }
+ }
+}
+
+STATIC
+CHAR8 *
+GetCCIXLinkSpeed (
+ IN UINTN Speed
+ )
+{
+ switch (Speed) {
+ case 1:
+ return "2.5 GT/s";
+
+ case 2:
+ return "5 GT/s";
+
+ case 3:
+ return "8 GT/s";
+
+ case 4:
+ case 6:
+ return "16 GT/s";
+
+ case 0xa:
+ return "20 GT/s";
+
+ case 0xf:
+ return "25 GT/s";
+ }
+
+ return "Unknown";
+}
+
+/**
+ Print system info
+**/
+STATIC VOID
+PrintSystemInfo (
+ VOID
+ )
+{
+ UINTN Idx;
+ VOID *Hob;
+ PLATFORM_INFO_HOB *PlatformHob;
+
+ Hob = GetFirstGuidHob (&gPlatformHobGuid);
+ if (Hob == NULL) {
+ return;
+ }
+
+ PlatformHob = (PLATFORM_INFO_HOB *)GET_GUID_HOB_DATA (Hob);
+
+ SerialPrint ("SCP FW version : %a\n", (const CHAR8
*)PlatformHob->SmPmProVer);
+ SerialPrint ("SCP FW build date : %a\n", (const CHAR8
*)PlatformHob->SmPmProBuild);
+
+ SerialPrint ("Failsafe status : %d\n",
PlatformHob->FailSafeStatus);
+ SerialPrint ("Reset status : %d\n",
PlatformHob->ResetStatus);
+ SerialPrint ("CPU info\n");
+ SerialPrint (" CPU ID : %X\n", ArmReadMidr ());
+ SerialPrint (" CPU Clock : %d MHz\n",
PlatformHob->CpuClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" Number of active sockets : %d\n",
GetNumberOfActiveSockets ());
+ SerialPrint (" Number of active cores : %d\n",
GetNumberOfActiveCores ());
+ if (IsSlaveSocketActive ()) {
+ SerialPrint (
+ " Inter Socket Connection 0 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[0],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[0])
+ );
+ SerialPrint (
+ " Inter Socket Connection 1 : Width: x%d / Speed %a\n",
+ PlatformHob->Link2PWidth[1],
+ GetCCIXLinkSpeed (PlatformHob->Link2PSpeed[1])
+ );
+ }
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Core voltage : %d\n", Idx,
PlatformHob->CoreVoltage[Idx]);
+ SerialPrint (" Socket[%d]: SCU ProductID : %X\n", Idx,
PlatformHob->ScuProductId[Idx]);
+ SerialPrint (" Socket[%d]: Max cores : %d\n", Idx,
PlatformHob->MaxNumOfCore[Idx]);
+ SerialPrint (" Socket[%d]: Warranty : %d\n", Idx,
PlatformHob->Warranty[Idx]);
+ SerialPrint (" Socket[%d]: Subnuma : %d\n", Idx,
PlatformHob->SubNumaMode[Idx]);
+ SerialPrint (" Socket[%d]: RC disable mask : %X\n", Idx,
PlatformHob->RcDisableMask[Idx]);
+ SerialPrint (" Socket[%d]: AVS enabled : %d\n", Idx,
PlatformHob->AvsEnable[Idx]);
+ SerialPrint (" Socket[%d]: AVS voltage : %d\n", Idx,
PlatformHob->AvsVoltageMV[Idx]);
+ }
+
+ SerialPrint ("SOC info\n");
+ SerialPrint (" DDR Frequency : %d MHz\n",
PlatformHob->DramInfo.MaxSpeed);
+ for (Idx = 0; Idx < GetNumberOfActiveSockets (); Idx++) {
+ SerialPrint (" Socket[%d]: Soc voltage : %d\n", Idx,
PlatformHob->SocVoltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM1 voltage : %d\n", Idx,
PlatformHob->Dimm1Voltage[Idx]);
+ SerialPrint (" Socket[%d]: DIMM2 voltage : %d\n", Idx,
PlatformHob->Dimm2Voltage[Idx]);
+ }
+
+ SerialPrint (" PCP Clock : %d MHz\n",
PlatformHob->PcpClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SOC Clock : %d MHz\n",
PlatformHob->SocClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" SYS Clock : %d MHz\n",
PlatformHob->SysClk / MHZ_SCALE_FACTOR);
+ SerialPrint (" AHB Clock : %d MHz\n",
PlatformHob->AhbClk / MHZ_SCALE_FACTOR);
+}
+
+/**
+ Entry point function for the PEIM
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @return EFI_SUCCESS If we installed our PPI
+
+**/
+EFI_STATUS
+EFIAPI
+DebugInfoPeiEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ PrintSystemInfo ();
+ PrintNVRAM ();
+
+ return EFI_SUCCESS;
+}
--
2.17.1
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