Reviewed-by: Ray Ni <ray...@intel.com> > -----Original Message----- > From: Wu, Jiaxin <jiaxin...@intel.com> > Sent: Friday, April 2, 2021 9:51 AM > To: devel@edk2.groups.io > Cc: Kinney, Michael D <michael.d.kin...@intel.com>; Liming Gao > <gaolim...@byosoft.com.cn>; Liu, Zhiguang > <zhiguang....@intel.com>; Ni, Ray <ray...@intel.com>; Yao, Jiewen > <jiewen....@intel.com>; Zhang, Hongbin1 > <hongbin1.zh...@intel.com> > Subject: [PATCH v2] MdePkg/BaseLib: Add support for the XSETBV instruction > > *v2: refine the coding format. > > https://bugzilla.tianocore.org/show_bug.cgi?id=3284 > > This patch is to support XSETBV instruction so as to support > Extended Control Register(XCR) write. > > Extended Control Register(XCR) read has already been supported > by below commit to support XGETBV instruction: > 9b3ca509abd4e45439bbdfe2c2fa8780c950320a > > Cc: Michael D Kinney <michael.d.kin...@intel.com> > Cc: Liming Gao <gaolim...@byosoft.com.cn> > Cc: Zhiguang Liu <zhiguang....@intel.com> > Cc: Ni Ray <ray...@intel.com> > Cc: Yao Jiewen <jiewen....@intel.com> > Signed-off-by: Jiaxin Wu <jiaxin...@intel.com> > Signed-off-by: Zhang Hongbin1 <hongbin1.zh...@intel.com> > --- > MdePkg/Include/Library/BaseLib.h | 25 +++++++++++++++++++++++- > MdePkg/Library/BaseLib/BaseLib.inf | 4 +++- > MdePkg/Library/BaseLib/Ia32/XSetBv.nasm | 34 > +++++++++++++++++++++++++++++++++ > MdePkg/Library/BaseLib/X64/XSetBv.nasm | 34 > +++++++++++++++++++++++++++++++++ > 4 files changed, 95 insertions(+), 2 deletions(-) > create mode 100644 MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > create mode 100644 MdePkg/Library/BaseLib/X64/XSetBv.nasm > > diff --git a/MdePkg/Include/Library/BaseLib.h > b/MdePkg/Include/Library/BaseLib.h > index 1171a0ffb5..7253997a6f 100644 > --- a/MdePkg/Include/Library/BaseLib.h > +++ b/MdePkg/Include/Library/BaseLib.h > @@ -1,10 +1,10 @@ > /** @file > Provides string functions, linked list functions, math functions, > synchronization > functions, file path functions, and CPU architecture-specific functions. > > -Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR> > +Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR> > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> > Copyright (c) Microsoft Corporation.<BR> > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All > rights reserved.<BR> > > SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -7436,10 +7436,33 @@ UINT64 > EFIAPI > AsmXGetBv ( > IN UINT32 Index > ); > > +/** > + Executes a XSETBV instruction to write a 64-bit value to a Extended Control > + Register(XCR), and returns the value. > + > + Writes the 64-bit value specified by Value to the XCR specified by Index. > The > + 64-bit value written to the XCR is returned. No parameter checking is > + performed on Index or Value, and some of these may cause CPU exceptions. > The > + caller must either guarantee that Index and Value are valid, or the caller > + must establish proper exception handlers. This function is only available > on > + IA-32 and x64. > + > + @param Index The 32-bit XCR index to write. > + @param Value The 64-bit value to write to the XCR. > + > + @return Value > + > +**/ > +UINT64 > +EFIAPI > +AsmXSetBv ( > + IN UINT32 Index, > + IN UINT64 Value > + ); > > /** > Executes a VMGEXIT instruction (VMMCALL with a REP prefix) > > Executes a VMGEXIT instruction. This function is only available on IA-32 > and > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf > b/MdePkg/Library/BaseLib/BaseLib.inf > index 3b85c56c3c..fe8f68bbcf 100644 > --- a/MdePkg/Library/BaseLib/BaseLib.inf > +++ b/MdePkg/Library/BaseLib/BaseLib.inf > @@ -1,9 +1,9 @@ > ## @file > # Base Library implementation. > # > -# Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR> > +# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR> > # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR> > # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights > reserved.<BR> > # > # SPDX-License-Identifier: BSD-2-Clause-Patent > @@ -182,10 +182,11 @@ > Ia32/LShiftU64.nasm| GCC > Ia32/EnableCache.nasm| GCC > Ia32/DisableCache.nasm| GCC > Ia32/RdRand.nasm > Ia32/XGetBv.nasm > + Ia32/XSetBv.nasm > Ia32/VmgExit.nasm > > Ia32/DivS64x64Remainder.c > Ia32/InternalSwitchStack.c | MSFT > Ia32/InternalSwitchStack.nasm | GCC > @@ -316,10 +317,11 @@ > X64/GccInlinePriv.c | GCC > X64/EnableDisableInterrupts.nasm > X64/DisablePaging64.nasm > X64/RdRand.nasm > X64/XGetBv.nasm > + X64/XSetBv.nasm > X64/VmgExit.nasm > ChkStkGcc.c | GCC > > [Sources.EBC] > Ebc/CpuBreakpoint.c > diff --git a/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > new file mode 100644 > index 0000000000..cf638d9a4d > --- /dev/null > +++ b/MdePkg/Library/BaseLib/Ia32/XSetBv.nasm > @@ -0,0 +1,34 @@ > +;------------------------------------------------------------------------------ > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; XSetBv.nasm > +; > +; Abstract: > +; > +; AsmXSetBv function > +; > +; Notes: > +; > +;------------------------------------------------------------------------------ > + > + SECTION .text > + > +;------------------------------------------------------------------------------ > +; UINT64 > +; EFIAPI > +; AsmXSetBv ( > +; IN UINT32 Index, > +; IN UINT64 Value > +; ); > +;------------------------------------------------------------------------------ > +global ASM_PFX(AsmXSetBv) > +ASM_PFX(AsmXSetBv): > + mov edx, [esp + 12] > + mov eax, [esp + 8] > + mov ecx, [esp + 4] > + xsetbv > + ret > diff --git a/MdePkg/Library/BaseLib/X64/XSetBv.nasm > b/MdePkg/Library/BaseLib/X64/XSetBv.nasm > new file mode 100644 > index 0000000000..c07e9b4c88 > --- /dev/null > +++ b/MdePkg/Library/BaseLib/X64/XSetBv.nasm > @@ -0,0 +1,34 @@ > +;------------------------------------------------------------------------------ > +; > +; Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > +; SPDX-License-Identifier: BSD-2-Clause-Patent > +; > +; Module Name: > +; > +; XSetBv.nasm > +; > +; Abstract: > +; > +; AsmXSetBv function > +; > +; Notes: > +; > +;------------------------------------------------------------------------------ > + > + DEFAULT REL > + SECTION .text > + > +;------------------------------------------------------------------------------ > +; UINT64 > +; EFIAPI > +; AsmXSetBv ( > +; IN UINT32 Index, > +; IN UINT64 Value > +; ); > +;------------------------------------------------------------------------------ > +global ASM_PFX(AsmXSetBv) > +ASM_PFX(AsmXSetBv): > + mov rax, rdx ; meanwhile, rax <- return value > + shr rdx, 0x20 ; edx:eax contains the value to > write > + xsetbv > + ret > -- > 2.16.2.windows.1
-=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#73634): https://edk2.groups.io/g/devel/message/73634 Mute This Topic: https://groups.io/mt/81793900/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
