Reviewed-by: Nate DeSimone <nathaniel.l.desim...@intel.com> > -----Original Message----- > From: Luo, Heng <heng....@intel.com> > Sent: Sunday, January 31, 2021 5:37 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Desimone, > Nathaniel L <nathaniel.l.desim...@intel.com> > Subject: [PATCH 28/40] TigerlakeSiliconPkg/IpBlock: Add Smbus component > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171 > > Adds the following files: > * IpBlock/Smbus/IncludePrivate > > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Signed-off-by: Heng Luo <heng....@intel.com> > --- > > Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Smbus/IncludePrivate/Register/Sm > busRegs.h | 50 > ++++++++++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 50 insertions(+) > > diff --git > a/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Smbus/IncludePrivate/Register/S > mbusRegs.h > b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Smbus/IncludePrivate/Register/S > mbusRegs.h > new file mode 100644 > index 0000000000..c863615583 > --- /dev/null > +++ > b/Silicon/Intel/TigerlakeSiliconPkg/IpBlock/Smbus/IncludePrivate/Register/S > mbusRegs.h > @@ -0,0 +1,50 @@ > +/** @file > > + Register names for PCH Smbus Device. > > + > > + Conventions: > > + > > + - Register definition format: > > + > Prefix_[GenerationName]_[ComponentName]_SubsystemName_RegisterS > pace_RegisterName > > + - Prefix: > > + Definitions beginning with "R_" are registers > > + Definitions beginning with "B_" are bits within registers > > + Definitions beginning with "V_" are meaningful values within the bits > > + Definitions beginning with "S_" are register size > > + Definitions beginning with "N_" are the bit position > > + - [GenerationName]: > > + Three letter acronym of the generation is used (e.g. SKL,KBL,CNL etc.). > > + Register name without GenerationName applies to all generations. > > + - [ComponentName]: > > + This field indicates the component name that the register belongs to > (e.g. > PCH, SA etc.) > > + Register name without ComponentName applies to all components. > > + Register that is specific to -LP denoted by "_PCH_LP_" in component > name. > > + - SubsystemName: > > + This field indicates the subsystem name of the component that the > register belongs to > > + (e.g. PCIE, USB, SATA, GPIO, PMC etc.). > > + - RegisterSpace: > > + MEM - MMIO space register of subsystem. > > + IO - IO space register of subsystem. > > + PCR - Private configuration register of subsystem. > > + CFG - PCI configuration space register of subsystem. > > + - RegisterName: > > + Full register name. > > + > > + Copyright (c) 2021, Intel Corporation. All rights reserved.<BR> > > + SPDX-License-Identifier: BSD-2-Clause-Patent > > +**/ > > +#ifndef _PCH_REGS_SMBUS_H_ > > +#define _PCH_REGS_SMBUS_H_ > > + > > +// > > +// SMBus Controller Registers > > +// > > +#define R_SMBUS_CFG_BASE 0x20 > > +#define B_SMBUS_CFG_BASE_BAR 0x0000FFE0 > > + > > +// > > +// SMBus I/O Registers > > +// > > +#define R_SMBUS_IO_HSTS 0x00 ///< Host Status Register R/W > > +#define B_SMBUS_IO_SMBALERT_STS 0x20 > > + > > +#endif > > -- > 2.24.0.windows.2
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