Hi Heng, Thank you so much for all your work on this! I have a couple of minor comments, however due to the size of this patch series I produced a summary of these comments here for your convenience:
[PATCH 01/40] #1) CpuPcieConfigGen3.h is only used on Rocket Lake boards for backwards socket compatibility with Comet Lake. It is not needed for Tiger Lake. Please remove it. #2) CpuPcieConfig.h - CPU_PCIE_CONFIG Is missing the following from its definition: CPU_PCIE_ROOT_PORT_CONFIG2 RootPort2[CPU_PCIE_MAX_ROOT_PORTS]; PCIE_COMMON_CONFIG2 PcieCommonConfig2; [PATCH 02/40] #1) FspmArchConfigPpi.h is a duplicate of a header file in IntelFsp2Pkg, please remove this duplicate #2) SiPolicy.h - Please also remove the #include for CpuPcieConfigGen3.h [PATCH 34/40] #1) DxeSaPolicyLib.c - There is an old comment that is no longer relevant, please delete. #2) DxeSaPolicyLibrary.h - Please also remove the #include for CpuPcieConfigGen3.h [PATCH 35/40] #1) DxeVtdInitFruLib.c - Comment on line 2 has a typo "Flu" should be "FRU" [PATCH 36/40] #1) PchSmiHelper.h - Comment on line 2 has a typo: "eSPI SMI Dispatch header" should be "PCH SMI Helper Header" [PATCH 39/40] #1) SiPkgCommonLib.dsc - The DEFINE PCH = Cnl is unused, please delete it. Thanks, Nate > -----Original Message----- > From: Luo, Heng <heng....@intel.com> > Sent: Sunday, January 31, 2021 5:37 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Desimone, > Nathaniel L <nathaniel.l.desim...@intel.com> > Subject: [PATCH 40/40] Maintainers.txt: Add TigerlakeSiliconPkg maintainers > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3171 > > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Signed-off-by: Heng Luo <heng....@intel.com> > --- > Maintainers.txt | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Maintainers.txt b/Maintainers.txt index 56e16fc48c..34f0b58581 > 100644 > --- a/Maintainers.txt > +++ b/Maintainers.txt > @@ -242,6 +242,12 @@ F: Silicon/Intel/KabylakeSiliconPkg/ > M: Chasel Chiu <chasel.c...@intel.com> M: Sai Chaganty > <rangasai.v.chaga...@intel.com> +Silicon/Intel/TigerlakeSiliconPkg+F: > Silicon/Intel/TigerlakeSiliconPkg/+M: Sai Chaganty > <rangasai.v.chaga...@intel.com>+M: Nate DeSimone > <nathaniel.l.desim...@intel.com>+R: Heng Luo <heng....@intel.com>+ > Silicon/Intel/SimicsX58SktPkg F: Silicon/Intel/SimicsX58SktPkg/ M: Agyeman > Prince <prince.agye...@intel.com>-- > 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71136): https://edk2.groups.io/g/devel/message/71136 Mute This Topic: https://groups.io/mt/80274157/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
