The default size is still 256MiB, but will be overwritten by
UefiPayloadPkg with the real MMCONF size.
e.g.: On embedded AMD platforms the MMCONF window size is usually
only 64MiB.
Fixes crash on platforms not exposing 256 buses.
Tested on:
* AMD Stoney Ridge
Signed-off-by: Patrick Rudolph <patrick.rudo...@9elements.com>
Signed-off-by: Marcello Sylvester Bauer <marcello.ba...@9elements.com>
Cc: Patrick Rudolph <patrick.rudo...@9elements.com>
Cc: Christian Walter <christian.wal...@9elements.com>
Cc: Maurice Ma <maurice...@intel.com>
Cc: Nate DeSimone <nathaniel.l.desim...@intel.com>
Cc: Benjamin You <benjamin....@intel.com>
---
UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc | 1 +
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf | 1 +
UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c | 4 +++-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
index 942bc9076634..5898a474f9e9 100644
--- a/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkgIa32X64.dsc
@@ -365,6 +365,7 @@ [PcdsDynamicDefault]
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0
################################################################################
#
diff --git a/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf
b/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf
index 1371d5eb7952..cebc81135565 100644
--- a/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf
+++ b/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.inf
@@ -54,6 +54,7 @@ [Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution
gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize
[Depex]
TRUE
diff --git a/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
b/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
index a3974dcc02f8..a746d0581ee3 100644
--- a/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
+++ b/UefiPayloadPkg/BlSupportDxe/BlSupportDxe.c
@@ -155,13 +155,15 @@ BlDxeEntryPoint (
}
//
- // Set PcdPciExpressBaseAddress by HOB info
+ // Set PcdPciExpressBaseAddress and PcdPciExpressBaseSize by HOB info
//
GuidHob = GetFirstGuidHob (&gUefiAcpiBoardInfoGuid);
if (GuidHob != NULL) {
AcpiBoardInfo = (ACPI_BOARD_INFO *)GET_GUID_HOB_DATA (GuidHob);
Status = PcdSet64S (PcdPciExpressBaseAddress,
AcpiBoardInfo->PcieBaseAddress);
ASSERT_EFI_ERROR (Status);
+ Status = PcdSet64S (PcdPciExpressBaseSize, AcpiBoardInfo->PcieBaseSize);
+ ASSERT_EFI_ERROR (Status);
}
return EFI_SUCCESS;
--
2.28.0
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