> On Jul 11, 2020, at 10:17 PM, Wasim Khan <wasim.k...@nxp.com> wrote: > > Hello > > Any comments ? >
I don’t see IoLibArm.c in master? I see IoLibNoIo.c. The MMIO function look like ARM assembler with the correct barrier instructions. The IO operations in this lib are the x86 in/out instructions, so they just ASSERT on ARM. On the X86 MemoryFence() is just a serializing intrinsic for the compiler to prevent optimizations from breaking the code, kind of like how you need to make MMIO as volatile in C. Thanks, Andrew Fish >> -----Original Message----- >> From: Wasim Khan >> Sent: Friday, July 10, 2020 6:20 PM >> To: michael.d.kin...@intel.com; liming....@intel.com; devel@edk2.groups.io >> Subject: [edk2-discuss] Need memory barriers in IoLib for AARCH64 >> >> Hello, >> >> MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf: >> IoLib library uses IoLibArm.c for AARCH64/ARM architecture and IoLib.c for >> other architectures. >> >> While IoLib.c already has memory barriers in MmioWrite functions, there >> barriers are missing in IoLibArm.c Is there any reason for **not** adding >> these >> memory barriers in IoLibArm.c to guarantee that all MMIO operations are >> serialized ? >> >> I am facing some issues and I need to add memory barriers in IoLibArm.c for >> AARCH64 also . >> >> >> Regards, >> Wasim > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#62385): https://edk2.groups.io/g/devel/message/62385 Mute This Topic: https://groups.io/mt/75417094/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
