Hello Ard, Would you please kindly review this change? Thank you, Irene -----Original Message----- From: Samer El-Haj-Mahmoud <samer.el-haj-mahm...@arm.com> Sent: Monday, June 22, 2020 5:01 PM To: devel@edk2.groups.io; Irene Park <ip...@nvidia.com>; Ard Biesheuvel <ard.biesheu...@arm.com> Subject: RE: [edk2-devel] [PATCH v2] ArmPlatformPkg/PL011UartLib: Check PID2 if FiFoDepth is zero
External email: Use caution opening links or attachments Adding Ard's new Arm e-mail address, and removing the old Linaro e-mail. Thanks, --Samer > -----Original Message----- > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Irene > Park via groups.io > Sent: Monday, June 22, 2020 4:15 PM > To: devel@edk2.groups.io; ard.biesheu...@linaro.org > Subject: Re: [edk2-devel] [PATCH v2] ArmPlatformPkg/PL011UartLib: > Check > PID2 if FiFoDepth is zero > > Hi Ard, > Would you please review this change ? > I also wonder what you think of the following. > > #if FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth) == 0 VS if > (FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth) == 0) or if > (HardwareFifoDepth == 0) > > Thank you, > Irene > > -----Original Message----- > From: Irene Park <ip...@nvidia.com> > Sent: Tuesday, June 9, 2020 1:59 PM > To: devel@edk2.groups.io > Cc: Irene Park <ip...@nvidia.com> > Subject: [PATCH v2] ArmPlatformPkg/PL011UartLib: Check PID2 if > FiFoDepth is zero > > From: Irene Park <ip...@nvidia.com> > > PL011UartLib determines its FIFO depth based on the PID2 value but the > register PID2 is not mandatory as per the SBSA spec. > This change won't check PID2 if PcdUartDefaultReceiveFifoDepth is set > to a value > 0. > > Signed-off-by: Irene Park <ip...@nvidia.com> > --- > ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c | 4 ++++ > ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf | 1 + > 2 files changed, 5 insertions(+) > > diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > index 801990d..05ad1ad 100644 > --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.c > @@ -79,9 +79,13 @@ PL011UartInitializePort ( > UINT32 Fractional; > UINT32 HardwareFifoDepth; > > + HardwareFifoDepth = FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth); > +#if FixedPcdGet16 (PcdUartDefaultReceiveFifoDepth) == 0 > HardwareFifoDepth = (PL011_UARTPID2_VER (MmioRead32 (UartBase + > UARTPID2)) \ > > PL011_VER_R1P4) \ > ? 32 : 16 ; > +#endif > + > // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we > can accept > // 1 char buffer as the minimum FIFO size. Because everything can > be rounded > // down, there is no maximum FIFO size. > diff --git a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > index d99e89f..e3da507 100644 > --- a/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > +++ b/ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf > @@ -30,6 +30,7 @@ > ArmPlatformPkg/ArmPlatformPkg.dec > > [FixedPcd] > + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate > > gArmPlatformTokenSpaceGuid.PL011UartInteger > -- > 2.7.4 > > > IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#61953): https://edk2.groups.io/g/devel/message/61953 Mute This Topic: https://groups.io/mt/75047196/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
