From: Vijayenthiran Subramaniam <vijayenthiran.subraman...@arm.com>
The RD-N1-Edge dual chip platform has an additional 8GB of memory
connected to the second chip. Add the SRAT ACPI table to describe
the proximity domain, base address and size of this memory.
Signed-off-by: Aditya Angadi <aditya.ang...@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc | 90
++++++++++++++++++++
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 11 +++
Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 9 ++
3 files changed, 110 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc
b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc
new file mode 100644
index 000000000000..1229a67d2574
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Srat.aslc
@@ -0,0 +1,90 @@
+/** @file
+* Static Resource Affinity Table (SRAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+//
+// Static Resource Affinity Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE Memory[4];
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE Gicc[16];
+} EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
+
+#pragma pack ()
+
+EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE,
+ EFI_ACPI_6_3_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION
+ ),
+ 0x00000001,
+ EFI_ACPI_RESERVED_QWORD
+ },
+ // Memory Affinity
+ {
+ // Chip 0 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, PcdSystemMemoryBase, PcdSystemMemorySize, 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x0, PcdDramBlock2Base, PcdDramBlock2Size, 0x00000001),
+
+ // Chip 1 (2GB and 6GB)
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, PcdDramBlock1BaseRemote1, PcdDramBlock1SizeRemote1, 0x00000001),
+ EFI_ACPI_6_3_MEMORY_AFFINITY_STRUCTURE_INIT (
+ 0x1, PcdDramBlock2BaseRemote1, PcdDramBlock2SizeRemote1, 0x00000001),
+ },
+ // Processor Affinity
+ {
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000000, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000001, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000002, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000003, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000004, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000005, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000006, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x0, 0x00000007, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000008, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x00000009, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000A, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000B, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000C, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000D, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000E, 0x00000001, 0x00000000),
+ EFI_ACPI_6_3_GICC_AFFINITY_STRUCTURE_INIT (
+ 0x1, 0x0000000F, 0x00000001, 0x00000000),
+ },
+};
+
+VOID* CONST ReferenceAcpiTable = &Srat;
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index 75f8e6dd6685..474a72d7d378 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -23,6 +23,7 @@ [Sources]
Mcfg.aslc
RdN1Edge/Dsdt.asl
RdN1EdgeX2/Madt.aslc
+ RdN1EdgeX2/Srat.aslc
Spcr.aslc
Ssdt.asl
@@ -39,6 +40,16 @@ [FixedPcd]
gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase
gArmPlatformTokenSpaceGuid.PL011UartInterrupt
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Base
+ gArmSgiTokenSpaceGuid.PcdDramBlock2Size
+
+ gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote1
+ gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote1
+ gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote1
+ gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote1
+
gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
index ca6db012192a..386cba7d1fdd 100644
--- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
+++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc
@@ -41,6 +41,15 @@ [PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|4
gArmPlatformTokenSpaceGuid.PcdClusterCount|2
+ # Number of chips on the platform
+ gArmSgiTokenSpaceGuid.PcdChipCount|2
+
+ # Remote chip memory base and size
+ gArmSgiTokenSpaceGuid.PcdDramBlock1BaseRemote1|0x40080000000
+ gArmSgiTokenSpaceGuid.PcdDramBlock1SizeRemote1|0x80000000
+ gArmSgiTokenSpaceGuid.PcdDramBlock2BaseRemote1|0x48080000000
+ gArmSgiTokenSpaceGuid.PcdDramBlock2SizeRemote1|0x180000000
+
################################################################################
#
# Components Section - list of all EDK II Modules needed by this Platform
--
2.17.1
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