Liming,
I agree that spec updates would be good so the CPU arch
name RISCV64 can be reserved.
However, I believe the current specs define their EBNF
to be flexible and support new CPU archs without a spec
change. As long as BaseTools follows the EBNF, no build
tool changes should be required to support a new arch.
For example the EBNF below supports <OA> that can be
and name.
<OA> ::= (a-zA-Z)(a-zA-Z0-9)*
<arch> ::= {"IA32"} {"X64"} {"EBC"} {<OA>} {"COMMON"}
I do not think any of the RISCV64 code changes should be
blocked by spec updates or BaseTools changes.
Do you agree?
Thanks,
Mike
> -----Original Message-----
> From: Gao, Liming <liming....@intel.com>
> Sent: Wednesday, March 11, 2020 11:47 PM
> To: Chang, Abner (HPS SW/FW Technologist)
> <abner.ch...@hpe.com>; devel@edk2.groups.io; Ni, Ray
> <ray...@intel.com>; Kinney, Michael D
> <michael.d.kin...@intel.com>
> Cc: Leif Lindholm <l...@nuviainc.com>; Chen, Gilbert
> <gilbert.c...@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schae...@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> for EDK2 CI.
>
> Edk2 spec are listed in
> https://github.com/tianocore/tianocore.github.io/wiki/E
> DK-II-Specifications
>
> This change requires to update INF/DEC/DSC/FDF/Build
> spec. You can find their github repo in the above link.
> Then, create git patch for the change.
>
> Thanks
> Liming
> -----Original Message-----
> From: Chang, Abner (HPS SW/FW Technologist)
> <abner.ch...@hpe.com>
> Sent: 2020年3月12日 14:27
> To: devel@edk2.groups.io; Ni, Ray <ray...@intel.com>;
> Gao, Liming <liming....@intel.com>; Kinney, Michael D
> <michael.d.kin...@intel.com>
> Cc: Leif Lindholm <l...@nuviainc.com>; Chen, Gilbert
> <gilbert.c...@hpe.com>; Schaefer, Daniel (DualStudy)
> <daniel.schae...@hpe.com>
> Subject: RE: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1 01/11] FatPkg: Add RISC-V architecture
> for EDK2 CI.
>
>
>
> > -----Original Message-----
> > From: devel@edk2.groups.io
> [mailto:devel@edk2.groups.io] On Behalf Of
> > Ni, Ray
> > Sent: Thursday, March 12, 2020 1:40 PM
> > To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW
> Technologist)
> > <abner.ch...@hpe.com>; Gao, Liming
> <liming....@intel.com>; Kinney,
> > Michael D <michael.d.kin...@intel.com>
> > Cc: Leif Lindholm <l...@nuviainc.com>; Chen, Gilbert
> > <gilbert.c...@hpe.com>; Schaefer, Daniel (DualStudy)
> > <daniel.schae...@hpe.com>
> > Subject: Re: [edk2-devel] [edk2/master PATCH RISC-V
> CI Code Changes v1
> > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> >
> > Abner,
> > Has the change to BaseTools supporting new ARCH been
> merged?
> No, not yet. The whole changes to RISCV64 ARCH is in
> the separate huge set of patches. We have three sets of
> RISC-V edk2 port.
>
> 1. Patches for RISC-V EDK2 CI enablement 2. Patches
> for edk2 modules other than RISC-V ones, which fix the
> issues for building packages respectively on RISC-V
> arch.
> 3 . RISC-V edk2 port
>
> The patch needs your Reviewed-by is belong to #2. We
> can have a PR for #3 and trigger CI testing once #1 and
> #2 are merged to master.
>
> >
> > Liming, Mike,
> > Does INF specification need to be updated for this
> new ARCH?
> Good question, how to submit the changes to these
> specs?
>
> >
> > Thanks,
> > Ray
> >
> > > -----Original Message-----
> > > From: devel@edk2.groups.io <devel@edk2.groups.io>
> On Behalf Of Abner
> > > Chang
> > > Sent: Friday, March 6, 2020 1:36 PM
> > > To: devel@edk2.groups.io
> > > Cc: abner.ch...@hpe.com; Ni, Ray
> <ray...@intel.com>; Leif Lindholm
> > > <l...@nuviainc.com>; Gilbert Chen
> <gilbert.c...@hpe.com>; Daniel
> > > Schaefer <daniel.schae...@hpe.com>
> > > Subject: [edk2-devel] [edk2/master PATCH RISC-V CI
> Code Changes v1
> > 01/11] FatPkg: Add RISC-V architecture for EDK2 CI.
> > >
> > > BZ:2562:
> > > https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__bugzilla.tianoc
> > > or
> > > e.org_show-5Fbug.cgi-3Fid-
> > 3D2562&d=DwIFAg&c=C5b8zRQO1miGmBeVZ2LFWg&r=_
> > >
> >
> SN6FZBN4Vgi4Ulkskz6qU3NYRO03nHp9P7Z5q59A3E&m=hdx0Amnugj
> VyUKB
> > Egf8jkKDBs
> > > rX81gAFwMi_pmEH2-
> > g&s=7pymX9FxJA5arZHTI9zd_qr3b2Jk2tx3OVff9UkxoW4&e=
> > >
> > > Add RISC-V architecture for EDK2 CI testing.
> > >
> > > Signed-off-by: Abner Chang <abner.ch...@hpe.com>
> > >
> > > Cc: Ray Ni <ray...@intel.com>
> > > Cc: Leif Lindholm <l...@nuviainc.com>
> > > Cc: Gilbert Chen <gilbert.c...@hpe.com>
> > > Cc: Daniel Schaefer <daniel.schae...@hpe.com>
> > > ---
> > > FatPkg/FatPkg.dsc | 3 ++-
> > > 1 file changed, 2 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
> index
> > > 1676c2eb8f..d86256068b 100644
> > > --- a/FatPkg/FatPkg.dsc
> > > +++ b/FatPkg/FatPkg.dsc
> > > @@ -4,6 +4,7 @@
> > > # This Platform file is used to generate the
> Binary Fat Drivers
> > >
> > > # for EDK II Prime release.
> > >
> > > # Copyright (c) 2007 - 2018, Intel Corporation.
> All rights
> > > reserved.<BR>
> > >
> > > +# Copyright (c) 2020, Hewlett Packard Enterprise
> Development LP.
> > > +All rights reserved.<BR>
> > >
> > > #
> > >
> > > # SPDX-License-Identifier: BSD-2-Clause-Patent
> > >
> > > #
> > >
> > > @@ -14,7 +15,7 @@
> > > PLATFORM_GUID = 25b55dbc-9d0b-
> 4a32-80da-46e1273d622c
> > >
> > > PLATFORM_VERSION = 0.3
> > >
> > > DSC_SPECIFICATION = 0x00010005
> > >
> > > - SUPPORTED_ARCHITECTURES =
> IA32|X64|EBC|ARM|AARCH64
> > >
> > > + SUPPORTED_ARCHITECTURES =
> > IA32|X64|EBC|ARM|AARCH64|RISCV64
> > >
> > > OUTPUT_DIRECTORY = Build/Fat
> > >
> > > BUILD_TARGETS =
> DEBUG|RELEASE|NOOPT
> > >
> > > SKUID_IDENTIFIER = DEFAULT
> > >
> > > --
> > > 2.25.0
> > >
> > >
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