On Wed, 18 Dec 2019 at 13:42, Pete Batard <p...@akeo.ie> wrote:
>
> From: Andrei Warkentin <andrey.warken...@gmail.com>
>
> Since the RPi4 PCIe host bridge is not ECAM compliant, we cannot
> expose it as a host bridge to the OS via ACPI, so we add a dummy
> MCFG table.
I don't think the MCFG table is mandatory, so if the OS complains
about this, we should fix the OS, not add dummy tables to work around
it.
> However, given the hardwired nature of this platform,
> we can expose the xHCI controller that is guaranteed to live at
> the base of the MMIO32 BAR window as a platform device directly.
>
> It should be noted that the xHCI table is not finalized at this
> stage, as Windows xHCI support is still a major question mark.
>
> Signed-off-by: Pete Batard <p...@akeo.ie>
> ---
> Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf | 5 +
> Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 1 +
> Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc | 81 +++++++++++
> Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl | 140
> ++++++++++++++++++++
> 4 files changed, 227 insertions(+)
>
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> index 6b1155d66444..69cb43a2f982 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/AcpiTables.inf
> @@ -29,6 +29,7 @@ [Sources]
> Fadt.aslc
> Dbg2.aslc
> Gtdt.aslc
> + Mcfg.aslc
> Dsdt.asl
> Csrt.aslc
> Spcr.aslc
> @@ -39,6 +40,8 @@ [Packages]
> EmbeddedPkg/EmbeddedPkg.dec
> MdeModulePkg/MdeModulePkg.dec
> MdePkg/MdePkg.dec
> + Silicon/Broadcom/Bcm27xx/Bcm27xx.dec
> + Silicon/Broadcom/Bcm283x/Bcm283x.dec
>
> [FixedPcd]
> gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> @@ -47,6 +50,8 @@ [FixedPcd]
> gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> gArmTokenSpaceGuid.PcdGicDistributorBase
> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciCpuMmioAdr
> + gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase
> gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> index 42e650a3ef29..b2f1d3439211 100644
> --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl
> @@ -22,6 +22,7 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2)
> {
> include ("Sdhc.asl")
> include ("Pep.asl")
> + include ("Xhci.asl")
>
> Device (CPU0)
> {
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
> b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
> new file mode 100644
> index 000000000000..7315e2a88c91
> --- /dev/null
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Mcfg.aslc
> @@ -0,0 +1,81 @@
> +/** @file
> + *
> + * Memory Mapped Configuration Address Space table (MCFG)
> + *
> + * Copyright (c) 2019, Pete Batard <p...@akeo.ie>
> + * Copyright (c) 2013-2015 Intel Corporation.
> + *
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + **/
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <IndustryStandard/MemoryMappedConfigurationSpaceAccessTable.h>
> +
> +#include "AcpiTables.h"
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +#define RPI_ACPI_OEM_MCFG_REVISION 0x00000001
> +//
> +// The Pi 4 is not ECAM compliant so, ideally, we would just skip populating
> +// an allocation structure. However, GenFw throws 'MCFG length check failed'
> +// when the number of allocation structures is zero, so we need at least one.
> +//
> +#define RPI_ACPI_ALLOCATION_STRUCTURE_COUNT 1
> +
> +typedef struct {
> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header;
> +
> EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE
> AllocationStructure[RPI_ACPI_ALLOCATION_STRUCTURE_COUNT];
> +} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE;
> +
> +STATIC EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE
> Mcfg =
> +{
> + {
> +
> //------------------------------------------------------------------------
> + // ACPI Table Header
> +
> //------------------------------------------------------------------------
> + {
> +
> EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
> + sizeof
> (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE),
> + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION,
> + 0x00, // Checksum calculated at
> runtime.
> + EFI_ACPI_OEM_ID, // OEMID is a 6 bytes long
> field "BC2836"
> + EFI_ACPI_OEM_TABLE_ID, // OEM table
> identification(8 bytes long) "RPI4EDK2"
> + EFI_ACPI_OEM_REVISION, // OEM revision number
> + EFI_ACPI_CREATOR_ID, // ASL compiler vendor ID
> + EFI_ACPI_CREATOR_REVISION // ASL compiler revision
> number
> + },
> +
> //------------------------------------------------------------------------
> + // Reserved
> +
> //------------------------------------------------------------------------
> + 0x0000000000000000, // Reserved
> + },
> +
> + //------------------------------------------------------------------------
> + // MCFG specific fields
> + //------------------------------------------------------------------------
> + {
> + {
> + //
> + // Using (-1) as the base address tells the OS to ignore it.
> + //
> + 0xFFFFFFFFFFFFFFFFULL, // BaseAddress
> + 0x0000, // PciSegmentGroupNumber
> + 0x00, // StartBusNumber
> + 0x00, // EndBusNumber
> + 0x00000000 // Reserved
> + }
> + }
> +};
> +
> +#pragma pack()
> +
> +//
> +// Reference the table being generated to prevent the optimizer from removing
> +// the data structure from the executable
> +//
> +VOID* CONST ReferenceAcpiTable = &Mcfg;
> diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> new file mode 100644
> index 000000000000..1eaeb7ba451b
> --- /dev/null
> +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Xhci.asl
> @@ -0,0 +1,140 @@
> +/** @file
> + *
> + * Copyright (c) 2019 Linaro, Limited. All rights reserved.
> + * Copyright (c) 2019 Andrei Warkentin <andrey.warken...@gmail.com>
> + *
> + * SPDX-License-Identifier: BSD-2-Clause-Patent
> + *
> + **/
> +
> +#include <IndustryStandard/Bcm2711.h>
> +
> +/*
> + * The following can be used to remove parenthesis from
> + * defined macros that the compiler complains about.
> + */
> +#define _REMOVE_PAREN(...) __VA_ARGS__
> +#define REMOVE_PAREN(x) _REMOVE_PAREN x
> +
> +/*
> + * According to UEFI boot log for the VLI device on Pi 4.
> + */
> +#define XHCI_REG_LENGTH 0x1000
> +
> +Device (SCB0) {
> + Name (_HID, "ACPI0004")
> + Name (_UID, 0x0)
> + Name (_CCA, 0x0)
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + /*
> + * Container devices with _DMA must have _CRS, meaning SCB0
> + * to provide all resources that XHC0 consumes (except
> + * interrupts).
> + */
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory(ResourceProducer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0xAAAA, // MIN
> + 0xBBBA, // MAX
> + 0x0,
> + 0x1111, // LEN
Could we make this slightly less ugly, by setting MIN and MAX to
PCIE_CPU_MMIO_WINDOW and LEN to 1, and only updating MAX and LEN below
by adding (XHCI_REG_LENGTH - 1) to them?
> + ,
> + ,
> + MMIO
> + )
> + })
> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
> + Store (XHCI_REG_LENGTH, MMLE)
> + Add (MMBA, MMLE, MMBE)
> + Return (RBUF)
> + }
> +
> + Name (_DMA, ResourceTemplate() {
> + /*
> + * XHC0 is limited to DMA to first 3GB. Note this
> + * only applies to PCIe, not GENET or other devices
> + * next to the A72.
> + */
> + QWordMemory(ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0x0, // MIN
> + 0xbfffffff, // MAX
> + 0x0, // TRA
> + 0xc0000000, // LEN
> + ,
> + ,
> + )
> + })
> +
> + Device (XHC0)
> + {
> + Name (_HID, "11063483") // _HID: Hardware ID
> + Name (_CID, "PNP0D10") // _CID: Hardware ID
> + Name (_UID, 0x0) // _UID: Unique ID
> + Name (_CCA, 0x0) // _CCA: Cache Coherency Attribute
> +
> + Method (_CRS, 0, Serialized) { // _CRS: Current Resource Settings
> + Name (RBUF, ResourceTemplate () {
> + QWordMemory(ResourceConsumer,
> + ,
> + MinFixed,
> + MaxFixed,
> + NonCacheable,
> + ReadWrite,
> + 0x0,
> + 0xAAAA, // MIN
> + 0xBBBA, // MAX
> + 0x0,
> + 0x1111, // LEN
Same here.
> + ,
> + ,
> + MMIO
> + )
> + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,
> ,, ) {
> + 175
> + }
> + })
> + CreateQwordField (RBUF, MMIO._MIN, MMBA)
> + CreateQwordField (RBUF, MMIO._MAX, MMBE)
> + CreateQwordField (RBUF, MMIO._LEN, MMLE)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBA)
> + Store (REMOVE_PAREN(PCIE_CPU_MMIO_WINDOW), MMBE)
> + Store (XHCI_REG_LENGTH, MMLE)
> + Add (MMBA, MMLE, MMBE)
> + Return (RBUF)
> + }
> +
> + Method (_INI, 0, Serialized) {
> + OperationRegion (PCFG, SystemMemory, REMOVE_PAREN(PCIE_REG_BASE)
> + PCIE_EXT_CFG_DATA, 0x1000)
> + Field (PCFG, AnyAcc, NoLock, Preserve) {
> + Offset (0),
> + VNID, 16, // Vendor ID
> + DVID, 16, // Device ID
> + CMND, 16, // Command register
> + STAT, 16, // Status register
> + }
> +
> + // Set command register to:
> + // 1) decode MMIO (set bit 1)
> + // 2) enable DMA (set bit 2)
> + // 3) enable interrupts (clear bit 10)
> + Debug = "xHCI enable"
> + Store (0x6, CMND)
> + }
> + }
> +}
> --
> 2.21.0.windows.1
>
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