On 2019.11.27 13:00, Ard Biesheuvel wrote:
On Wed, 27 Nov 2019 at 13:56, Pete Batard <p...@akeo.ie> wrote:
On 2019.11.27 12:48, Ard Biesheuvel wrote:
On Wed, 27 Nov 2019 at 13:37, Pete Batard <p...@akeo.ie> wrote:
Add missing RNG registers, prefer reusing shorter define's
instead of PCDs and clean up spacing.
Is there a source for these register definitions?
I used the most recent Linux driver I could find (but I guess I need to
point out that it was used for reference with regards to the registers.
Especially, no code was copied from that source).
It seems the Linux
driver deviates from the below (and the warmup count thing uses the
status register as well), so it would be helpful to quote the
authoritative reference here.
https://github.com/raspberrypi/linux/blob/rpi-5.4.y/drivers/char/hw_random/iproc-rng200.c#L223-L224
seems to indicate that RNG_WARMUP_COUNT (0x40000) should go into
RNG_TOTAL_BIT_COUNT_THRESHOLD_OFFSET (them) / RNG_BIT_COUNT_THRESHOLD
(us) and not the status register.
Now, of course, since we don't have a public datasheet, it's hard to
have absolute certainty on what's the proper register to write, but I
guess the most recent code with a Broadcom Corporation copyright has to
our next best thing when it comes to authoritative answer...
Well, there is this one too
https://github.com/raspberrypi/linux/blob/rpi-5.4.y/drivers/char/hw_random/bcm2835-rng.c
which is what I used as the basis for the existing version.
Okay. Looks like 2835 (which has to be the basis for the Bcm2837 used on
the Pi 3) and 2838 (basis for Bcm2711) have at least one difference with
regards to where the warmup count should go.
I guess an easy fix, if we don't want to have to spin 2 separate
drivers, is to write to both RNG_STATUS and RNG_BIT_COUNT_THRESHOLD
during init.
I have tested on Pi 3 and not seen any ill effect to writing to
RNG_BIT_COUNT_THRESHOLD.
Would something like this work for you in a v2?
Alternatively, I could change the new PcdBcm283xRngUseFifo PCD to
PcdBcm283xRng2838Compatible and use that for the conditional code.
Regards,
/Pete
Signed-off-by: Pete Batard <p...@akeo.ie>
---
Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 23
++++++++++++--------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
index 72c8e9dc4b14..744c7ac3b9f4 100644
--- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
@@ -24,8 +24,7 @@
/* watchdog constants */
#define BCM2836_WDOG_OFFSET 0x00100000
-#define BCM2836_WDOG_BASE_ADDRESS (FixedPcdGet64
(PcdBcm283xRegistersAddress) \
- +
BCM2836_WDOG_OFFSET)
+#define BCM2836_WDOG_BASE_ADDRESS
(BCM2836_SOC_REGISTERS + BCM2836_WDOG_OFFSET)
#define BCM2836_WDOG_PASSWORD 0x5a000000
#define BCM2836_WDOG_RSTC_OFFSET 0x0000001c
#define BCM2836_WDOG_WDOG_OFFSET 0x00000024
@@ -34,8 +33,7 @@
/* mailbox interface constants */
#define BCM2836_MBOX_OFFSET 0x0000b880
-#define BCM2836_MBOX_BASE_ADDRESS (FixedPcdGet64
(PcdBcm283xRegistersAddress) \
- +
BCM2836_MBOX_OFFSET)
+#define BCM2836_MBOX_BASE_ADDRESS
(BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
#define BCM2836_MBOX_READ_OFFSET 0x00000000
#define BCM2836_MBOX_STATUS_OFFSET 0x00000018
#define BCM2836_MBOX_CONFIG_OFFSET 0x0000001c
@@ -51,12 +49,19 @@
#define BCM2836_INTC_TIMER_PENDING_OFFSET 0x00000060
/* random number generator */
-#define RNG_BASE_ADDRESS (BCM2836_SOC_REGISTERS + 0x00104000)
+#define BCM2836_RNG_OFFSET 0x00104000
+#define RNG_BASE_ADDRESS
(BCM2836_SOC_REGISTERS + BCM2836_RNG_OFFSET)
-#define RNG_CTRL (RNG_BASE_ADDRESS + 0x0)
-#define RNG_STATUS (RNG_BASE_ADDRESS + 0x4)
-#define RNG_DATA (RNG_BASE_ADDRESS + 0x8)
+#define RNG_CTRL (RNG_BASE_ADDRESS
+ 0x0)
+#define RNG_STATUS (RNG_BASE_ADDRESS
+ 0x4)
+#define RNG_DATA (RNG_BASE_ADDRESS
+ 0x8)
+#define RNG_BIT_COUNT (RNG_BASE_ADDRESS
+ 0xc)
+#define RNG_BIT_COUNT_THRESHOLD (RNG_BASE_ADDRESS
+ 0x10)
+#define RNG_INT_STATUS (RNG_BASE_ADDRESS
+ 0x18)
+#define RNG_INT_ENABLE (RNG_BASE_ADDRESS
+ 0x1c)
+#define RNG_FIFO_DATA (RNG_BASE_ADDRESS
+ 0x20)
+#define RNG_FIFO_COUNT (RNG_BASE_ADDRESS
+ 0x24)
-#define RNG_CTRL_ENABLE 0x1
+#define RNG_CTRL_ENABLE 0x1
#endif /*__BCM2836_H__ */
--
2.21.0.windows.1
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