REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2305
System Slots (Type 9):
– SMBIOSCR00184: add PCI Express Gen 4 values
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Liming Gao <liming....@intel.com>
Cc: Sai Chaganty <rangasai.v.chaga...@intel.com>
Signed-off-by: Zhichao Gao <zhichao....@intel.com>
---
MdePkg/Include/IndustryStandard/SmBios.h | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index f504cc84e7..0a31e37f18 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1,7 +1,7 @@
/** @file
Industry Standard Definitions of SMBIOS Table Specification v3.3.0.
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>
(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -1307,7 +1307,13 @@ typedef enum {
SlotTypePciExpressGen3X2 = 0xB3,
SlotTypePciExpressGen3X4 = 0xB4,
SlotTypePciExpressGen3X8 = 0xB5,
- SlotTypePciExpressGen3X16 = 0xB6
+ SlotTypePciExpressGen3X16 = 0xB6,
+ SlotTypePciExpressGen4 = 0xB8,
+ SlotTypePciExpressGen4X1 = 0xB9,
+ SlotTypePciExpressGen4X2 = 0xBA,
+ SlotTypePciExpressGen4X4 = 0xBB,
+ SlotTypePciExpressGen4X8 = 0xBC,
+ SlotTypePciExpressGen4X16 = 0xBD
} MISC_SLOT_TYPE;
///
--
2.21.0.windows.1
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