On Thu, Sep 19, 2019 at 11:51:19AM +0800, Gilbert Chen wrote: > Initial version of SiFive RISC-V core libraries. Library of each core > creates processor core SMBIOS data hob for building SMBIOS > records in DXE phase.
So yes, this implementation needs to change. These should all implement the same LibraryClass. Also, U54 appears to be a simple superset of U51. What I would suggest is creating a Silicon/SiFive/Library/SiFiveCoreInfoLib, which calls into a SiFiveSoCCoreInfoLib in Silicon/SiFive/<SoC>/Library, providing the acual SoC-specific bits. / Leif > Signed-off-by: Gilbert Chen <gilbert.c...@hpe.com> > --- > .../E51/Library/PeiCoreInfoHobLib/CoreInfoHob.c | 242 +++++++++++++++++ > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 51 ++++ > .../U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c | 294 > +++++++++++++++++++++ > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 51 ++++ > .../Library/PeiCoreInfoHobLib/CoreInfoHob.c | 185 +++++++++++++ > .../PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf | 50 ++++ > 6 files changed, 873 insertions(+) > create mode 100644 Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/CoreInfoHob.c > create mode 100644 > Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf > create mode 100644 Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/CoreInfoHob.c > create mode 100644 > Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf > create mode 100644 > Silicon/SiFive/U54MCCoreplex/Library/PeiCoreInfoHobLib/CoreInfoHob.c > create mode 100644 > Silicon/SiFive/U54MCCoreplex/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#48354): https://edk2.groups.io/g/devel/message/48354 Mute This Topic: https://groups.io/mt/34196349/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-