REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2108
SmramMemoryReserve.h has been added into Edk2\MdePkg\Include\Guid\SmramMemoryReserve.h. The duplicated header file can be cleaned up. Edk2Platforms\Silicon\Intel\PurleySktPkg\Include\Guid\SmramMemoryReserve.h Cc: Thad Gillispie <thad.gillis...@intel.com> Cc: Daocheng Bu <daocheng...@intel.com> Cc: Isaac W Oram <isaac.w.o...@intel.com> Co-authored-by: Nate DeSimone <nathaniel.l.desim...@intel.com> Signed-off-by: Marc W Chen <marc.w.c...@intel.com> Signed-off-by: Nate DeSimone <nathaniel.l.desim...@intel.com> --- .../Include/Guid/SmramMemoryReserve.h | 43 ------------------- Silicon/Intel/PurleySktPkg/SocketPkg.dec | 3 +- 2 files changed, 1 insertion(+), 45 deletions(-) delete mode 100644 Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h diff --git a/Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h b/Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h deleted file mode 100644 index 46e8198f00..0000000000 --- a/Silicon/Intel/PurleySktPkg/Include/Guid/SmramMemoryReserve.h @@ -1,43 +0,0 @@ -/** @file - -Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> -SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ -#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_ - -#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \ - { \ - 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } \ - } - -/** -* GUID specific data structure of HOB for reserving SMRAM regions. -* -* Inconsistent with specification here: -* EFI_HOB_SMRAM_DESCRIPTOR_BLOCK has been changed to EFI_SMRAM_HOB_DESCRIPTOR_BLOCK. -* This inconsistency is kept in code in order for backward compatibility. -**/ -typedef struct { - /// - /// Designates the number of possible regions in the system - /// that can be usable for SMRAM. - /// - /// Inconsistent with specification here: - /// In Framework SMM CIS 0.91 specification, it defines the field type as UINTN. - /// However, HOBs are supposed to be CPU neutral, so UINT32 should be used instead. - /// - UINT32 NumberOfSmmReservedRegions; - /// - /// Used throughout this protocol to describe the candidate - /// regions for SMRAM that are supported by this platform. - /// - EFI_SMRAM_DESCRIPTOR Descriptor[1]; -} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK; - -extern EFI_GUID gEfiSmmPeiSmramMemoryReserveGuid; - -#endif - diff --git a/Silicon/Intel/PurleySktPkg/SocketPkg.dec b/Silicon/Intel/PurleySktPkg/SocketPkg.dec index 2ff937f5d8..e554a9555d 100644 --- a/Silicon/Intel/PurleySktPkg/SocketPkg.dec +++ b/Silicon/Intel/PurleySktPkg/SocketPkg.dec @@ -1,6 +1,6 @@ ### @file # -# Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> +# Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -51,7 +51,6 @@ gEfiRasClvTesterGuid = { 0x9bd36f4f, 0x08dc, 0x4eab, { 0x86, 0x37, 0x2b, 0xc1, 0xbd, 0x5e, 0x0d, 0x95 } } gSocketPkgFpgaGuid = { 0x624b948f, 0x6eba, 0x4dfd, { 0x9d, 0xda, 0x10, 0xb0, 0x07, 0x3a, 0x37, 0x35 } } # {624B948F-6EBA-4DFD-9DDA-10B0073A3735} gIioPolicyHobGuid = { 0xcabb327, 0x11fe, 0x416b, { 0xae, 0x80, 0x2d, 0xe5, 0xdf, 0x60, 0xf7, 0x7d } } - gEfiSmmPeiSmramMemoryReserveGuid = { 0x6dadf1d1, 0xd4cc, 0x4910, { 0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } } [Ppis] gPeiBaseMemoryTestPpiGuid = { 0xb6ec423c, 0x21d2, 0x490d, { 0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } } -- 2.17.1.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46686): https://edk2.groups.io/g/devel/message/46686 Mute This Topic: https://groups.io/mt/33112756/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-