Due to RISC-V timer CSR is platform implementation specific, RISC-V CPU DXE driver invokes platform level timer library to access to timer CSRs.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Abner Chang <abner.ch...@hpe.com> --- RiscVPkg/Universal/CpuDxe/CpuDxe.inf | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/RiscVPkg/Universal/CpuDxe/CpuDxe.inf b/RiscVPkg/Universal/CpuDxe/CpuDxe.inf index f33bcb9..93638e7 100644 --- a/RiscVPkg/Universal/CpuDxe/CpuDxe.inf +++ b/RiscVPkg/Universal/CpuDxe/CpuDxe.inf @@ -1,7 +1,7 @@ ## @file # RISC-V CPU DXE module. # -# Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> +# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR> # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at @@ -43,6 +43,7 @@ HobLib ReportStatusCodeLib RiscVCpuLib + RiscVPlatformTimerLib [Sources] CpuDxe.c -- 2.7.4 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#46419): https://edk2.groups.io/g/devel/message/46419 Mute This Topic: https://groups.io/mt/33043363/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
