Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
> -----Original Message----- > From: Kubacki, Michael A > Sent: Saturday, August 17, 2019 8:16 AM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V <rangasai.v.chaga...@intel.com>; Chiu, Chasel > <chasel.c...@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desim...@intel.com>; Gao, Liming <liming....@intel.com>; > Kinney, Michael D <michael.d.kin...@intel.com>; Sinha, Ankit > <ankit.si...@intel.com> > Subject: [edk2-platforms][PATCH V1 20/37] CoffeelakeSiliconPkg/Pch: Add > SMM library instances > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2082 > > Adds PCH SMM library class instances. > > * SmmSpiFlashCommonLib > > Cc: Sai Chaganty <rangasai.v.chaga...@intel.com> > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Cc: Liming Gao <liming....@intel.com> > Cc: Michael D Kinney <michael.d.kin...@intel.com> > Cc: Ankit Sinha <ankit.si...@intel.com> > Signed-off-by: Michael Kubacki <michael.a.kuba...@intel.com> > --- > > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/Sm > mSpiFlashCommonLib.inf | 51 +++++ > > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF > lashCommon.c | 196 ++++++++++++++++++++ > > Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/SpiF > lashCommonSmmLib.c | 54 ++++++ > 3 files changed, 301 insertions(+) > > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > mmSpiFlashCommonLib.inf > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > mmSpiFlashCommonLib.inf > new file mode 100644 > index 0000000000..abc919867c > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SmmSpiFlashCommonLib.inf > @@ -0,0 +1,51 @@ > +## @file > +# SMM Library instance of Spi Flash Common Library Class # # Copyright > +(c) 2019 Intel Corporation. All rights reserved. <BR> # # > +SPDX-License-Identifier: BSD-2-Clause-Patent # ## > + > +[Defines] > + INF_VERSION = 0x00010017 > + BASE_NAME = SmmSpiFlashCommonLib > + FILE_GUID = 9632D96E-E849-4217-9217-DC500B8AAE47 > + VERSION_STRING = 1.0 > + MODULE_TYPE = DXE_SMM_DRIVER > + LIBRARY_CLASS = SpiFlashCommonLib|DXE_SMM_DRIVER > + CONSTRUCTOR = SmmSpiFlashCommonLibConstructor > +# > +# The following information is for reference only and not required by the > build tools. > +# > +# VALID_ARCHITECTURES = IA32 X64 > +# > + > +[LibraryClasses] > + PciLib > + IoLib > + MemoryAllocationLib > + BaseLib > + UefiLib > + SmmServicesTableLib > + BaseMemoryLib > + DebugLib > + MmPciLib > + > +[Packages] > + MdePkg/MdePkg.dec > + CoffeelakeSiliconPkg/SiPkg.dec > + > +[Pcd] > + gSiPkgTokenSpaceGuid.PcdBiosAreaBaseAddress ## CONSUMES > + gSiPkgTokenSpaceGuid.PcdBiosSize ## CONSUMES > + > +[Sources] > + SpiFlashCommonSmmLib.c > + SpiFlashCommon.c > + > +[Protocols] > + gPchSmmSpiProtocolGuid ## CONSUMES > + > +[Depex.X64.DXE_SMM_DRIVER] > + gPchSmmSpiProtocolGuid > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommon.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommon.c > new file mode 100644 > index 0000000000..53711db632 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SpiFlashCommon.c > @@ -0,0 +1,196 @@ > +/** @file > + Wrap EFI_SPI_PROTOCOL to provide some library level interfaces > + for module use. > + > + Copyright (c) 2019 Intel Corporation. All rights reserved. <BR> > + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include <Library/SpiFlashCommonLib.h> > +#include <Library/IoLib.h> > +#include <Library/PciLib.h> > +#include <PchAccess.h> > +#include <Library/MmPciLib.h> > +#include <Protocol/Spi.h> > + > + > +PCH_SPI_PROTOCOL *mSpiProtocol; > + > +// > +// FlashAreaBaseAddress and Size for boottime and runtime usage. > +// > +UINTN mFlashAreaBaseAddress = 0; > +UINTN mFlashAreaSize = 0; > + > +/** > + Enable block protection on the Serial Flash device. > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashLock ( > + VOID > + ) > +{ > + return EFI_SUCCESS; > +} > + > +/** > + Read NumBytes bytes of data from the address specified by > + PAddress into Buffer. > + > + @param[in] Address The starting physical address of the read. > + @param[in,out] NumBytes On input, the number of bytes to read. On > output, the number > + of bytes actually read. > + @param[out] Buffer The destination data buffer for the read. > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashRead ( > + IN UINTN Address, > + IN OUT UINT32 *NumBytes, > + OUT UINT8 *Buffer > + ) > +{ > + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); > + if ((NumBytes == NULL) || (Buffer == NULL)) { > + return EFI_INVALID_PARAMETER; > + } > + > + // > + // This function is implemented specifically for those platforms // > + at which the SPI device is memory mapped for read. So this // > + function just do a memory copy for Spi Flash Read. > + // > + CopyMem (Buffer, (VOID *) Address, *NumBytes); > + > + return EFI_SUCCESS; > +} > + > +/** > + Write NumBytes bytes of data from Buffer to the address specified by > + PAddresss. > + > + @param[in] Address The starting physical address of the write. > + @param[in,out] NumBytes On input, the number of bytes to write. > On output, > + the actual number of bytes written. > + @param[in] Buffer The source data buffer for the write. > + > + @retval EFI_SUCCESS Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashWrite ( > + IN UINTN Address, > + IN OUT UINT32 *NumBytes, > + IN UINT8 *Buffer > + ) > +{ > + EFI_STATUS Status; > + UINTN Offset; > + UINT32 Length; > + UINT32 RemainingBytes; > + > + ASSERT ((NumBytes != NULL) && (Buffer != NULL)); if ((NumBytes == > + NULL) || (Buffer == NULL)) { > + return EFI_INVALID_PARAMETER; > + } > + > + ASSERT (Address >= mFlashAreaBaseAddress); > + > + Offset = Address - mFlashAreaBaseAddress; > + > + ASSERT ((*NumBytes + Offset) <= mFlashAreaSize); > + > + Status = EFI_SUCCESS; > + RemainingBytes = *NumBytes; > + > + > + while (RemainingBytes > 0) { > + if (RemainingBytes > SECTOR_SIZE_4KB) { > + Length = SECTOR_SIZE_4KB; > + } else { > + Length = RemainingBytes; > + } > + Status = mSpiProtocol->FlashWrite ( > + mSpiProtocol, > + FlashRegionBios, > + (UINT32) Offset, > + Length, > + Buffer > + ); > + if (EFI_ERROR (Status)) { > + break; > + } > + RemainingBytes -= Length; > + Offset += Length; > + Buffer += Length; > + } > + > + // > + // Actual number of bytes written > + // > + *NumBytes -= RemainingBytes; > + > + return Status; > +} > + > +/** > + Erase the block starting at Address. > + > + @param[in] Address The starting physical address of the block to > be > erased. > + This library assume that caller garantee that > the > PAddress > + is at the starting address of this block. > + @param[in] NumBytes On input, the number of bytes of the logical > block to be erased. > + On output, the actual number of bytes erased. > + > + @retval EFI_SUCCESS. Opertion is successful. > + @retval EFI_DEVICE_ERROR If there is any device errors. > + > +**/ > +EFI_STATUS > +EFIAPI > +SpiFlashBlockErase ( > + IN UINTN Address, > + IN UINTN *NumBytes > + ) > +{ > + EFI_STATUS Status; > + UINTN Offset; > + UINTN RemainingBytes; > + > + ASSERT (NumBytes != NULL); > + if (NumBytes == NULL) { > + return EFI_INVALID_PARAMETER; > + } > + > + ASSERT (Address >= mFlashAreaBaseAddress); > + > + Offset = Address - mFlashAreaBaseAddress; > + > + ASSERT ((*NumBytes % SECTOR_SIZE_4KB) == 0); ASSERT ((*NumBytes + > + Offset) <= mFlashAreaSize); > + > + Status = EFI_SUCCESS; > + RemainingBytes = *NumBytes; > + > + > + Status = mSpiProtocol->FlashErase ( > + mSpiProtocol, > + FlashRegionBios, > + (UINT32) Offset, > + (UINT32) RemainingBytes > + ); > + return Status; > +} > + > diff --git > a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommonSmmLib.c > b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLib/S > piFlashCommonSmmLib.c > new file mode 100644 > index 0000000000..43c0218d85 > --- /dev/null > +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/SmmSpiFlashCommonLi > +++ b/SpiFlashCommonSmmLib.c > @@ -0,0 +1,54 @@ > +/** @file > + SMM Library instance of SPI Flash Common Library Class > + > + Copyright (c) 2019 Intel Corporation. All rights reserved. <BR> > + > + SPDX-License-Identifier: BSD-2-Clause-Patent **/ > + > +#include <Library/SpiFlashCommonLib.h> > +#include <Library/SmmServicesTableLib.h> #include <Protocol/Spi.h> > + > +extern PCH_SPI_PROTOCOL *mSpiProtocol; > + > +extern UINTN mFlashAreaBaseAddress; > +extern UINTN mFlashAreaSize; > + > +/** > + The library constructuor. > + > + The function does the necessary initialization work for this library > + instance. > + > + @param[in] ImageHandle The firmware allocated handle for the UEFI > image. > + @param[in] SystemTable A pointer to the EFI system table. > + > + @retval EFI_SUCCESS The function always return EFI_SUCCESS for > now. > + It will ASSERT on error for debug version. > + @retval EFI_ERROR Please reference LocateProtocol for error > code > details. > +**/ > +EFI_STATUS > +EFIAPI > +SmmSpiFlashCommonLibConstructor ( > + IN EFI_HANDLE ImageHandle, > + IN EFI_SYSTEM_TABLE *SystemTable > + ) > +{ > + EFI_STATUS Status; > + > + mFlashAreaBaseAddress = (UINTN)PcdGet32 (PcdBiosAreaBaseAddress); > + mFlashAreaSize = (UINTN)PcdGet32 (PcdBiosSize); > + > + // > + // Locate the SMM SPI protocol. > + // > + Status = gSmst->SmmLocateProtocol ( > + &gPchSmmSpiProtocolGuid, > + NULL, > + (VOID **) &mSpiProtocol > + ); > + ASSERT_EFI_ERROR (Status); > + > + return Status; > +} > -- > 2.16.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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