Introduce new callback that can provide information
about PCIE controller per-board description.
A new structure is defined containing base addresses,
windows/bus configuration and reset GPIO usage indication.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <m...@semihalf.com>
---
Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h | 46 ++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
index 6ec5ace..530a2ba 100644
--- a/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
+++ b/Silicon/Marvell/Include/Library/ArmadaBoardDescLib.h
@@ -15,6 +15,7 @@
#define __ARMADA_BOARD_DESC_LIB_H__
#include <Library/ArmadaSoCDescLib.h>
+#include <Library/MvGpioLib.h>
//
// COMPHY controllers per-board description
@@ -111,6 +112,51 @@ typedef struct {
} MV_BOARD_XHCI_DESC;
//
+// PCIE controllers description
+//
+typedef struct {
+ EFI_PHYSICAL_ADDRESS PcieBaseAddress;
+ EFI_PHYSICAL_ADDRESS ConfigSpaceAddress;
+ BOOLEAN HaveResetGpio;
+ MV_GPIO_PIN PcieResetGpio;
+ UINT64 PcieBusMin;
+ UINT64 PcieBusMax;
+ UINT64 PcieIoTranslation;
+ UINT64 PcieIoWinBase;
+ UINT64 PcieIoWinSize;
+ UINT64 PcieMmio32Translation;
+ UINT64 PcieMmio32WinBase;
+ UINT64 PcieMmio32WinSize;
+ UINT64 PcieMmio64Translation;
+ UINT64 PcieMmio64WinBase;
+ UINT64 PcieMmio64WinSize;
+} MV_PCIE_CONTROLLER;
+
+typedef struct {
+ MV_PCIE_CONTROLLER *PcieControllers;
+ UINTN PcieControllerCount;
+} MV_BOARD_PCIE_DESCRIPTION;
+
+/**
+ Return the number and description of PCIE controllers used on the platform.
+
+ @param[in out] **PcieControllers Array containing PCIE controllers'
+ description.
+ @param[in out] *PcieControllerCount Amount of used PCIE controllers.
+
+ @retval EFI_SUCCESS The data were obtained successfully.
+ @retval EFI_NOT_FOUND None of the controllers is used.
+ @retval other Return error status.
+
+**/
+EFI_STATUS
+EFIAPI
+ArmadaBoardPcieControllerGet (
+ IN OUT MV_PCIE_CONTROLLER **PcieControllers,
+ IN OUT UINTN *PcieControllerCount
+ );
+
+//
// PP2 NIC devices per-board description
//
typedef struct {
--
2.7.4
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