On Wed, 17 Apr 2019 at 23:20, Marcin Wojtas <m...@semihalf.com> wrote: > > Most recent ARM-TF ComPhy PCIE initialization routines check > additional mode parameter in order to determine, where the SMC > is called from (OS / firmware). Adjust to that. > > This patch fixes the Linux boot with DT. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marcin Wojtas <m...@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Pushed as af08f2f4d4a3..14d177e378bd > --- > Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h > b/Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h > index 9fd6602..e918f01 100644 > --- a/Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h > +++ b/Silicon/Marvell/Library/ComPhyLib/ComPhySipSvc.h > @@ -43,11 +43,13 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH > DAMAGE. > */ > > /* Helper macros for passing ComPhy parameters to the EL3 */ > +#define COMPHY_CALLED_FROM_FW (1 << 21) > #define COMPHY_FW_MODE_FORMAT(mode) (mode << 12) > #define COMPHY_FW_FORMAT(mode, idx, speeds) \ > ((mode << 12) | (idx << 8) | (speeds << > 2)) > #define COMPHY_FW_PCIE_FORMAT(pcie_width, mode, speeds) \ > - ((pcie_width << 18) | COMPHY_FW_FORMAT (mode, 0, > speeds)) > + (COMPHY_CALLED_FROM_FW | ((pcie_width) << 18) > | \ > + COMPHY_FW_FORMAT(mode, 0, speeds)) > > /* Comphy speed */ > #define COMPHY_SPEED_1_25G 0 > -- > 2.7.4 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#39349): https://edk2.groups.io/g/devel/message/39349 Mute This Topic: https://groups.io/mt/31216925/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
