Reviewed-by: Eric Dong <eric.d...@intel.com>
> -----Original Message-----
> From: Ni, Ray
> Sent: Monday, April 8, 2019 5:11 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric <eric.d...@intel.com>
> Subject: [PATCH v2] UefiCpuPkg/Cpuid.h: Update CPUID.7H.ECX structure
> for 5-level paging
>
> Reserved6 is changed to Reserved7 because the bit width is changed.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ray Ni <ray...@intel.com>
> Cc: Eric Dong <eric.d...@intel.com>
> ---
> UefiCpuPkg/Include/Register/Cpuid.h | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/UefiCpuPkg/Include/Register/Cpuid.h
> b/UefiCpuPkg/Include/Register/Cpuid.h
> index e0f4f968f4..a67f2a1dff 100644
> --- a/UefiCpuPkg/Include/Register/Cpuid.h
> +++ b/UefiCpuPkg/Include/Register/Cpuid.h
> @@ -1506,8 +1506,11 @@ typedef union {
> /// [Bits 14] AVX512_VPOPCNTDQ. (Intel Xeon Phi only.).
> ///
> UINT32 AVX512_VPOPCNTDQ:1;
> - UINT32 Reserved6:2;
> -
> + UINT32 Reserved7:1;
> + ///
> + /// [Bits 16] Supports 5-level paging if 1.
> + ///
> + UINT32 FiveLevelPage:1;
> ///
> /// [Bits 21:17] The value of MAWAU used by the BNDLDX and BNDSTX
> instructions
> /// in 64-bit mode.
> --
> 2.21.0.windows.1
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#38666): https://edk2.groups.io/g/devel/message/38666
Mute This Topic: https://groups.io/mt/30960973/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-
