On Wed, Sep 24, 2014 at 11:24:00AM -0700, Jarno Rajahalme wrote: > Aligned 64-bit memory accesses in i586 are atomic. By using an SSE > register we can make such memory accesses in one instruction without > bus-locking. Need to compile with -msse to enable this feature. > > Signed-off-by: Jarno Rajahalme <jrajaha...@nicira.com>
I guess that ovs-atomic-i586 must be aimed at older versions of XenServer, which always run on 64-bit capable processors but in 32-bit mode. That means that we can always build with -msse for XenServer. Should we patch xenserver/openvswitch-xen.spec to do that? The non-SSE code in atomic_read_8__() is very clever. I am not sure that I would have thought of using the existing value in EBX:ECX as the value to write as well. It works around the PIC issue very well, without needing any extra code. I am not sure why the asm statements for reading atomic variables are volatile. I don't think they have any side effects. Acked-by: Ben Pfaff <b...@nicira.com> _______________________________________________ dev mailing list dev@openvswitch.org http://openvswitch.org/mailman/listinfo/dev