On Fri, Aug 22, 2014 at 01:58:14PM -0700, Jarno Rajahalme wrote: > When an atomic variable is not serving to synchronize threads about > the state of other (atomic or non-atomic) variables, no memory barrier > is needed with the atomic operation. However, the default memory > order for an atomic operation is memory_order_seq_cst, which always > causes a system-wide locking of the memory bus and prevents both the > CPU and the compiler from reordering memory accesses accross the > atomic operation. This can add considerable stalls as each atomic > operation (regardless of memory order) always includes a memory > access. > > In most cases we can let the compiler reorder memory accesses to > minimize the time we spend waiting for the completion of the atomic > memory accesses by using the relaxed memory order. This patch adds > helpers to make such accesses a little easier on the eye (and the > fingers :-), but does not try to hide them completely. > > Following patches make use of these and remove all the (implied) > memory_order_seq_cst use from the OVS code base. > > Signed-off-by: Jarno Rajahalme <jrajaha...@nicira.com>
Acked-by: Ben Pfaff <b...@nicira.com> _______________________________________________ dev mailing list dev@openvswitch.org http://openvswitch.org/mailman/listinfo/dev
