On Aug 22, 2014, at 1:58 PM, Jarno Rajahalme <jrajaha...@nicira.com> wrote:
> The default memory order for atomic operations is > memory_order_seq_cst, which synchronizes the whole system, i.e., locks > the memory bus, which is very expensive. memory_order_relaxed, on the > other hand, does not impose any kind of memory barrier (not even a > compiler barrier), which allows for better code optimization. The > cost of atomic access itself remains: an atomic access always causes a > memory system access (which usually is cached). Should have noted that atomic read-modify-write operations (add, sub, etc.) lock the bus anyway, but atomic stores and loads do not if the memory order is “relaxed”. Jarno _______________________________________________ dev mailing list dev@openvswitch.org http://openvswitch.org/mailman/listinfo/dev
