Dear Tomek and NuttX Community,
I hope this email finds you well.
First, I want to sincerely apologize for the long delay in responding
to your feedback. The delay is due to a combination of technical
issues with my university email and my inexperience with open-source
mailing list conventions. Please allow me to explain:
What happened:
- On August 2, I sent my initial email regarding the N32H7 port from
my university email address.
- You replied on the same day (which I now know from the mail
archive), but my university email system completely missed your
reply—it never appeared in my inbox.
- Over the next three weeks, I continued working on the port, adding
USBHS, SDMMC, CORDIC, and completing all benchmarks.
- On August 25, I attempted to send a follow-up, but mistakenly
replied to my own email instead of yours.
- Today (September 1), I finally used Thunderbird with the correct
mailto link and In-Reply-To header to respond to your original
message.
This is my first time contributing to a large open-source project,
and I am still learning the proper workflow. I appreciate your
patience and understanding.
The good news: while I was struggling with email, I didn't stop
working. Since my initial announcement on August 2, I have completed
the full Board Support Package for the N32H762IIL7.
Additional Drivers Completed:
-----------------------------
- USBHS (Device and Host modes, fully functional)
- CORDIC (hardware accelerated math)
- SDMMC (ADMA2 supported, FATFS verified)
All drivers have been tested on hardware at 600 MHz. Complete test log
available at:
https://github.com/Felix-LJY/nuttx/blob/felix-liao/arch/arm/src/n32h7/nuttx_test.log
Key Benchmark Highlights:
-------------------------
CoreMark (GCC 15.3.1, -O2, -march=armv7e-m, -mfpu=fpv5-d16):
2358.861456 (3.93 CoreMark/MHz)
Reference: STM32H750 @ 480 MHz scores ~1588 (~3.31 CoreMark/MHz)
This represents a ~48.5% performance advantage over STM32H750
at the same CoreMark/MHz metric.
MTD Flash (/dev/mtd0):
Write: 1689.77 KiB/s | Read: 22755.56 KiB/s | Verification: PASSED
SDMMC (sdbench, block size 4096):
Sequential Write: 1423.2 KB/s | Sequential Read: 4728.1 KB/s
OS Performance (osperf, 100 iterations, units in DWT cycles):
context-switch: 724 | pthread-create: 12330 | semwait: 85
ostest: All tests PASSED (vfork, getopt, FPU, task_restart, waitpid,
wqueue, mutex, timed mutex, cancel, robust, semaphore, cond,
pthread_exit, rwlock, timed wait, timed mqueue, sigprocmask,
signal handler, nested signal, POSIX timer, spinlock, wdog,
round-robin, barrier, scheduler lock, performance counter)
Additional Benchmarks:
ramspeed : memcpy/memset bandwidth validated
pi_css5 : 32768 digits of PI calculated in 0.72 seconds
(verified on FATFS with SD card)
/proc/cpuinfo: ARMv7-M rev 2, 600 MHz
Commit History (58,796 lines net increment, excluding merge commit):
--------------------------------------------------------------------
The work was developed across 6 logical commits (merge commit
f122931d0830 excluded from the final patch series):
1. 2f74095b9009 : Add chip n32h762 and devkit board skeleton
(initial Kconfig, chip.h, irq.h, memorymap,
initial driver stubs)
2. de39b210e8d1 : Add capture, flash, and USBHS (developing)
(n32_capture, n32_flash, n32_usbhsdev/host)
3. 23a695eec8a8 : USBHS device mode porting completed
4. 9d675076c512 : USBHS host, CORDIC, CoreMark completed;
SDMMC development started
5. 98d7392ec3bd : SDMMC in progress (driver refinements)
6. c4b493bf3696 : SDMMC completed with ADMA2 support;
sdbench verified (1.3 MB/s WR, 4.7 MB/s RD)
I am currently resolving all checkpatch warnings and will include a
final cleanup commit before submitting the PR.
Now that I have resolved the email issues, I am ready to proceed
with the PR submission. I would greatly appreciate your guidance on:
1. Documentation: Should I add a new page under
Documentation/platforms/arm/n32h7/? Are there specific template
requirements?
2. Testing Logs: Full logs are available at the GitHub link above.
Is this format acceptable, or do you prefer logs included inline
or linked externally?
3. Patch Granularity: Is the 6-commit split acceptable, or do you
prefer finer granularity? Should I submit a Draft PR for early
review?
The code compiles with zero warnings on both GCC (15+) and Clang (19+).
Thank you for your time and patience. I am fully committed to
bringing N32H7 support to NuttX and will follow all community
guidelines going forward.
Best regards,
Felix LIAO (JingYue LIAO)
Southwest Jiaotong University
GitHub: Felix-LJY
