Hi Tim, I don't know about the internal clock of SAMA5D27, but maybe some other configuration is changing the SFR.
Do you have GDB working on your system? Maybe you can try to use watchpoint at this register position, see here: https://acassis.wordpress.com/2015/07/07/using-watchpoints-in-the-gdb-to-verify-register-access/ I hope it help you to discovery what is going on. BR, Alan On 7/9/21, Tim <t...@jti.uk.com.invalid> wrote: > Hi, > > Making slow progress getting MCAN sorted properly on my custom sama5d27 > board and when clocking it from the "UPLL" clokc (an internal PLL used to > generate a 480MHz clock for the USB interfaces, and a useful clock for > higher speed CAN setups) I found that the CAN baud rate was out. > > This is because there is a special function register (SFR) that has to be > set to reflect the crystal frequency used. This is correctly set by the > AT91 > bootloader and/or Uboot (I can read it at the start of the bringup code OK) > but somewhere it is being changed to the wrong value again and I can't find > where - a grep for the relevant SFR register in all of the nuttx code > doesn't reveal anything (it only exists in my code or the sam_sfr header > file as far as I can see) > > I have done a quick fix by re-writing the correct value in my bringup code > but that isn't the right way to sort this. > > Any suggestions of how to find where/why/how this is being changed? > > Thanks, > > Tim. > > > >
