Thanks for everyone's help on this. All working now. It transpires the msgram can be in SDRAM not just in ISRAM so the solution is much more like the samV71 using cached memory, but it is handled a little differently in a few places of course.
No thanks AT ALL to the Atmel datasheet which says: "The MSBs [bits 31:16] of the CAN Message RAM for CAN0 and CAN1 are configured in 0x00200000". I took "in" to mean "as". The statement makes even less sense anyway, as they are actually configured in a Special Function Register which is not referenced in the MCAN section at all...and default to 0x200020 in actual fact! So, much time was wasted :( But boy have I learned a lot these last few weeks LOL.
