Anyone on this? I am using the LAN8720A Ethernet PHY. I realized that this IC in some rare cases may get stuck. The Ethernet LEDs blink erratically, and no Ethernet communication is possible. The only way to recover from this state is to reset the PHY. (MIIM works in this case)
To diagnose the issue, I monitor the MII_LAN8720_SECR register (symbol error count). This register typically contains a very small value. Usually 0, or something close to that. When the problem occurs, this value increases very very rapidly (something like thousands of errors per second). I need to monitor this register for excessive error count, and if the problem occurs to reset the PHY. I believe that the correct place to do so is in board logic. 1. Is there a way to do so? 2. Would it be more appropriate to do so in the arch low-level driver? I could find any function that can monitor this periodically. 3. Is it actually needed? Is there any error handling logic anywhere that will bring the interface down in case of MII-level errors? (Then I could just reset it during ifdown) Στις Κυρ, 14 Φεβ 2021 στις 2:36 μ.μ., ο/η Fotis Panagiotopoulos < f.j.pa...@gmail.com> έγραψε: > Hi everybody, > > I am trying to perform some reads/writes to my Ethernet PHY (LAN8720A) in > board-level. > > I am pretty confused on what is the correct interface to use for this > purpose. > As far as I can tell, it is only possible to perform MII read/writes > through ioctl's in application code. > How can the board logic control the PHY? Is this possible? >
