On Mon, Jul 6, 2020 at 9:48 PM Brennan Ashton <bash...@brennanashton.com> wrote:
> The EOS S3 SOC unfortunately seems to have very limited interrupt > support for the UART peripheral. The TX interrupt is limited to when > the tx fifo reaches certain levels of full and does not seem to have a > FIFO "empty" interrupt which is what the serial driver expects. I was > wondering if there are any other examples for handling this beyond a > worker to periodically check if the FIFO can take more data? I don't know about this micro in particular but I've found that when UARTs support DMA, that usually works much better than interrupts. Micros I've used from different vendors have had hardware errata related to the UART interrupts where they come at the wrong time or just unreliably, and the workaround I've often seen suggested is to use DMA. As an alternative, based on the bit time / baud rate you can setup a timer peripheral to fire an interrupt after waiting the right length of time for the bits to get shifted out. I've done that before with reliable results, though it's a waste of a timer peripheral. (I think I've had to use timers even with DMA when software-controlling a data-enable output for RS-485, because the DMA interrupt fires when the last character is moved from the FIFO to the shift register, a whole 10 bit times before the transmitter finishes. In such a case, a timer is unavoidable. Or a busy waiting loop that wastes time.) The other alternative I've used is a task that periodically monitors a TX complete bit. This comes with more jitter than anything interrupt-based. The best alternative is probably DMA if you can do it with the given hardware and your application. Nathan
